This study presents a code acquisition architecture for a global navigation satellite system (GNSS). The proposed scheme aim to reduce buffer resource required without reducing the number of code, frequency and satellite bins. Therefore the GNSS signal has no information loss. The code acquisition process in a GNSS attempts to find the code phase of a satellite signal, and it includes three procedures: coherent integration (CI), correlation and in CI. The proposed code acquisition architecture provides a lower operation count for correlation with reduced memory consumption. Firstly, the memory in CI and the shift register in the correlator are integrated by changing the operation sequence of CI and correlation. Thus, half of the memory in CI can be removed, and the shift register becomes the sharing buffer for both correlation and CI. Secondly, the addition count in the correlation is reduced by combining a parallel differential matched filter (PDMF) with a two-dimensional (2D) architecture to form a memory-based 2D-PDMF correlator. Finally, changing the sample sequence before integration reduces the memory of in CI. Compared with conventional code acquisition, the proposed design can reduce register consumption by 80% and addition count by 60% operation count for correlation and 50% memory consumption of incoherent integration.