Integrating two-dimensional (2D) materials into semiconductor manufacturing lines is essential to exploit their material properties in a wide range of application areas. However, current approaches are not compatible with high-volume manufacturing on wafer level. Here, we report a generic methodology for large-area integration of 2D materials by adhesive wafer bonding. Our approach avoids manual handling and uses equipment, processes, and materials that are readily available in large-scale semiconductor manufacturing lines. We demonstrate the transfer of CVD graphene from copper foils (100-mm diameter) and molybdenum disulfide (MoS2) from SiO2/Si chips (centimeter-sized) to silicon wafers (100-mm diameter). Furthermore, we stack graphene with CVD hexagonal boron nitride and MoS2 layers to heterostructures, and fabricate encapsulated field-effect graphene devices, with high carrier mobilities of up to $$4520\;{\mathrm{cm}}^2{\mathrm{V}}^{ - 1}{\mathrm{s}}^{ - 1}$$ 4520 cm 2 V − 1 s − 1 . Thus, our approach is suited for backend of the line integration of 2D materials on top of integrated circuits, with potential to accelerate progress in electronics, photonics, and sensing.

We report on the fabrication and characterization of field-effect transistors (FETs) based on chemical vapor deposited (CVD) graphene encapsulated between few layer CVD boron nitride (BN) sheets with complementary metal-oxide-semiconductor (CMOS) compatible nickel edge contacts. Noncontact terahertz time-domain spectroscopy (THz-TDS) of large-area BN/graphene/ BN (BN/G/BN) stacks reveals average sheet conductivity >1 mS/sq. and average mobility of 2500 cm 2 /V • s. Improved output conductance is observed in dc measurements under ambient conditions, indicating the potential for radio frequency (RF) applications. Moreover, we report a maximum voltage gain of 6 dB from a low-frequency signal amplifier circuit. RF characterization of the GFETs yields an f T × L g product of 2.64 GHz • µm and an f Max × L g product of 5.88 GHz • µm. This paper presents for the first time THz-TDS usage in combination with other characterization methods for device performance assessment on BN/G/BN stacks. The results serve as a step toward scalable, all CVD 2-D material-based FETs for CMOS compatible future nanoelectronic circuit architectures.

Two-dimensional (2D) materials, such as graphene, are seen as potential candidates for fabricating electronic devices and circuits on flexible substrates. Inks or dispersions of 2D materials can be deposited on flexible substrates by large-scale coating techniques, such as inkjet printing and spray coating. One of the main issues in coating processes is nonuniform deposition of inks, which may lead to large variations of properties across the substrates. Here, we investigate the role of surface morphology on the performance of graphene ink deposited on different paper substrates with specific top coatings. Substrates with good wetting properties result in reproducible thin films and electrical properties with low sheet resistance. The correct choice of surface morphology enables high-performance films without postdeposition annealing or treatment. Scanning terahertz time-domain spectroscopy (THz-TDS) is introduced to evaluate both the uniformity and the local conductivity of graphene inks on paper. A paper-based strain gauge is demonstrated and a variable resistor acts as an on–off switch for operating an LED. Customized surfaces can thus help in unleashing the full potential of ink-based 2D materials.