32 tap FIR Filter is designed utilizing Vedic multiplier and Kogge stone adder. Effective performance is important for FIR Filter design due to increasing complexity. Two basic opertaions of FIR Filter are multiplication and addition. So, for multiplication, vedic multiplier is used and addition is performed by KS adder which is faster than other adders like Ripple carry adder, Look ahead carry adder, Carry select adder etc. K S adder is used to overcome problem of carry propagation. The objective is to minimize the propagation delay i.e increasing the speed of filter. Synthesis & simulation is done by Xilinx ISE 14.7 software tool using VHDL.