Based on theoretical assumptions from film psychology and their application to video games, the hypothesis is tested that suspense is a major factor in video game enjoyment. A first-person shooter game was experimentally manipulated to create either a low level or a high level of suspense. Sixty-three participants were randomly assigned to experimental conditions; enjoyment was assessed after playing by a 10-item rating scale. Results support the assumption that suspense is a driver of video game enjoyment.
The neural chip SAND/1 (Simple Applicable Neural Device) was designed to accelerate computations of neural networks at a very low cost basis. Low cost means that only few peripheral chips are necessary to use the neural network chip in applications. The design criterions of the chip are described. A PCI-board was developed and a VME-board is under construction to facilitate applications. At present, time series prognosis, multidimensional curve fitting, pattern recognition in gamma-shower detection and mammography are under evaluation. The last application is described in more detail.
Managing different variants and configurations of complex embedded systems consisting of multiple exchangeable hardware modules is a difficult task. This is in particular true when selecting a certain variant and configuration affects several aspects of development, deployment and operation. In this paper, we describe our approach for product line development of a highly flexible, modular embedded system, which can be assembled in many different ways. Each composition can be perceived as a prototype, because it requires a specific FPGA firmware, and offers different parameters changeable at runtime. A key component of our solution is a model-based description of possible variations. It enables automatic generation of source code as well as configuration files. Through this it is possible to provide new variants and configurations very fast and the response time to customer requests is improved. We outline how the model can be well-integrated with technologies and tools used for development, deployment and operation of the overall system. This involves run-time parametrization of the system and configuration of secondary tools using standard office documents, but the focus lies on the link between model and FPGA implementation (VHDL). We propose a powerful but still easy to understand template-based approach for this purpose.
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