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Technology scaling inevitably leads to fabrication processes, which are more susceptible to production faults. At the same time, devices become more vulnerable to wear-out effects, which reduce the long term system reliability. The upcoming challenge of future designs is the development of integrated test and repair techniques dealing with both types of fault mechanisms. Our paper presents a built-in self-test (BIST) and repair solution for regular data path structures of VLIW processors by software-based self-test (SBST). After fault detection and localization by software a hardware reconfiguration, by using redundant components, takes place. Our software test and repair solution can be used to improve yield as well as reliability.

Reconfigurable architectures are increasingly employed in a large range of embedded applications, mainly due to their ability to provide high performance and high flexibility, combined with the possibility to be tuned according to the specific task they address. Reconfigurable systems are today used in several application areas, and are also suitable for systems employed in safety-critical environments. The actual development trend in this area is focused on the usage of the reconfigurable features to improve the fault tolerance and the self-test and the self-repair capabilities of the considered systems. The state-of-the-art of the reconfigurable systems is today represented by Very Long Instruction Word (VLIW) processors and reconfigurable systems based on partially reconfigurable SRAM-based FPGAs. In this paper, we present an overview and accurate analysis of these two type of reconfigurable systems. The content of the paper is focused on analyzing design features, f ail-safe and reconfigurable features oriented to self-adaptive mitigation and redundancy approaches applied during the design phase. Experimental results reporting a clear status of the test data and fault tolerance robustness are detailed and commented

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