On modern many-core CPUs, performance tuning against complex memory subsystems and scalability for parallelism is mandatory to achieve their potential. In this article, we focus on loop tiling, which plays an important role in performance tuning, and develop a novel framework that analytically models the load balance and empirically autotunes unpredictable cache behaviors through iterative polyhedral compilation using LLVM/Polly. From an evaluation on many-core CPUs, we demonstrate that our autotuner achieves a performance superior to those that use conventional static approaches and well-known autotuning heuristics. Moreover, our autotuner achieves almost the same performance as a brute-force search-based approach.

Three nannofossil datum planes of the Early Pleistocen e are identified in the cores from subsurface at Irabu Island, South Ryukyus . The result allows for the first time to date the initial sedimentation of the reef-related Riukiu Limestone there . It represents the age (1 .2M a) turning from siliciclastics to shallow-water carbonate regime . Implication of this transition time is discussed briefly in relation with both local neotectonis m resulting in the birth of a backarc basin (Okinawa Trough) and regional to global reor ganization of paleoceanographic environments.

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