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An Educational Design Kit (EDK) which supports a 32/28nm design flow is described which includes all the necessary design rules, models, technology files, verification and extraction command decks, scripts, symbol libraries, and PyCells. It also includes a Digital Standard Cell Library (DSCL) which supports all contemporary low power design techniques; an Standard and Special I/O Cell Libraries (IOSCL and IOSpCL); a set of memories (SOM) with different word and data depths; a set of low-power memories (SOM LP) and a phase-locked loop (PLL).These components of the EDK augment any type of design for educational and research purposes. Though the EDK does not contain any foundry information, it allows 32/28nm technology with high accuracy close to real processes to be implemented in the designs

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