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He joined Bell Laboratories, Holmdel, NJ, as a member of the technical staff in May 1980. * His interests include operating systems and pattem recognition. He is currently working towards a Ph.D. degree in computer science at Rutgers University.

Engineering Change Order (ECO), is an effective technique for fixing circuit functionality and timing problems after the placement stage. We proposed a new approach to solve the function and timing problems simultaneously by rerouting the netlist to the spare cells. The proposed approach includes two stages (1) functional change with timing consideration and (2) timing optimization. In the first stage, a spare cell selection algorithm is designed to select proper spare cells which can solve the functional change problems with timing consideration. After the first stage, we conduct timing analysis to find paths which violated the timing constraints, and using gate sizing and buffer insertion techniques to remedy those paths. Experimental results are based on five industry benchmarks. The results show that our approach is effective and efficient in fixing the functional change problem and timing optimization problem.