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In this paper, a 1 mm  1 mm fully integrated wideband dual-stage power ampli¯er (PA) for long-term evolution (LTE) band 1 MHz) is presented. Fabricated in a 2 m InGaP/ GaAs hetero-junction bipolar transistor (HBT) process, the operating gain is observed to be 31.3 dB. The PA meets the minimum adjacent channel leakage ratio (ACLR) requirement of À30 dBc for LTE with 20 MHz wide channel bandwidth up to an output power of 30 dBm with the aid of a novel dual stage linearizer. Biased at low quiescent current of less than 100 mA with a headroom consumption of 3.5 V, the power added e±ciency (PAE) is observed to be 38.29% at 30 dBm. With this high linear output power, the stringent requirement of antenna path loss is nulli¯ed. PA serves to be the¯rst reported work to achieve 30 dBm linear output power at supply voltage of 3.5 V.

A new method to improve the battery life span of a 4G handset power amplifier (PA) is proposed. This technique is realized by employing a novel passive linearization topology on a class-E PA. Implemented in a 2 µm InGaP/GaAs Hetero-Junction Bipolar Transistor (HBT) technology, the PA delivers 49 % of power added efficiency (PAE) at output power of 28 dBm while complying with the Long Term Evolution (LTE) regulation at Band 1(1920 MHz-1980 MHz) with corresponding supply voltage headroom of 4 V. The performance enhancement is achieved at LTE channel bandwidth of 20 MHz. To the best of the author's knowledge, this is the first class-E PA which meets adjacent channel leakage ratio (ACLR) specifications at 20 MHz LTE bandwidth.

Purpose -The purpose of this paper is to design and realize a high gain power amplifier (PA) with low output back-off power using the InGaP/GaAs HBT process for WCDMA applications from 1.85 to 1.91 GHz. Design/methodology/approach -A three stages cascaded PA is designed which observes a high power gain. A 100 mA of quiescent current helps the PA to operate efficiently. The final stage device dimension has been selected diligently in order to deliver a high output power. The inter-stage match between the driver and main stage has been designed to provide maximum power transfer. The output matching network is constructed to deliver a high linear output power which meets the WCDMA adjacent channel leakage ratio (ACLR) requirement of 2 33 dBc close to the 1 dB gain compression point. Findings -With the cascaded topology, a maximum 31.3 dB of gain is achieved at 1.9 GHz. S11 of less than 2 18 dB is achieved across the operating frequency band. The maximum output power is indicated to be 32.7 dBm. An ACLR of 2 33 dBc is achieved at maximum linear output power of 31 dBm. Practical implications -The designed PA is an excellent candidate to be employed in the WCDMA transmitter chain without the aid of additional driver amplifier and linearization circuits. Originality/value -In this work, a fully integrated GaAs HBT PA has been implemented which is capable to operate linearly close to its 1 dB gain compression point.

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