No abstract

The Current Steering Data Converter with Thermometer technique is designed and analyzed utilizing 180nm technology in Cadence Virtuoso Simulation tool along with power supply of 1.8 V. Implementation of DAC is accomplished in such a manner that the output results subsume less non-linearities and less glitches. A novel design is proposed to ameliorate the differential non-linearities and glitches occur in the data converter to a great extent. Layout of proposed DAC is designed and realized under Cadence Assura Tool with Design Rule Check and Layout Versus Schematic. The INL is calculated with resultant values 0.256LSB.

This paper enumerates new architecture of low power dual-edge triggered Flip-Flop (DETFF)