The rate at which a digital signal processing (DSP) system operates depends on the highest frequency component in the input signal. DSP applications must sample their inputs at a frequency at least twice the highest frequency in the input signal (i.e., the Nyquist rate) to accurately reproduce the signal. Typically a fixed sampling rate, guaranteed to always be high enough, is used. However, an input signal may have periods when the signal has little high frequency content as well as periods of silence. When the input signal has no perceptible high frequency components, the system can reduce its sampling rate, thereby reducing the number of samples processed per second, allowing the CPU speed to be scaled down without reducing output quality. This paper describes how to reduce power consumption in DSP applications by varying the amount of processing based on the input signal, and reports results of experiments with a prototype implementation. Experiments with a prototype show that when the system performs little processing, the added overhead of the variable sampling rate technique increased power consumption. When the system performs more processing, 18 FIR filters per frame, the power consumption was reduced to 40 % of the power required for a static sampling rate, while not reducing sound quality.
Network performance for a particular application is determined by the latency and bisection bandwidth that are achieved for the set of specific communication patterns used by that application. The number of nodes with which each node might potentially communicate grows linearly as nodes are added, thus, network cost for large systems either becomes a large fraction of machine cost or performance suffers. However, performance-critical communication patterns commonly occurring in real parallel programs rarely require that each node directly communicate with every other node.The number of node pairs actually communicating generally grows far slower than the expected O(N 2 ). Thus, a carefully designed network for a massively parallel system can use relatively narrow switches while still providing single-switch latency and guaranteed pairwise bandwidth for performance-critical communications. This paper introduces Sparse Flat Neighborhood Networks (SFNNs), a variant of Flat Neighborhood Networks (FNNs) which are engineered from first principles to efficiently meet these detailed pairwise communication performance criteria.
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