In order to achieve high resolution in Successive Approximation Register (SAR) Analog to Digital Converter (ADC), a novel noncoupling capacitor split capacitor array structure is proposed, which solves the coupling capacitor mismatch problem in the traditional split capacitor array structure. This paper analyzes the structure and its capacitor array mismatch. Based on the structure and analysis, a 12-bit SAR ADC is designed and implemented in GSMC 0.11 [Formula: see text]m CMOS process. The measured results show that the Signal to Noise Ratio (SNR) is 72.61 dB and Effective Number Of Bits (ENOB) is 11.77 bit, which prove the advantages of this structure in the design of high resolution SAR ADC.
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