12-bit buttongenerator CMOS ADC with SOI-structure and a supply voltage of 1.8 ±5%

Abstract

Considered architecture CMOS ADC with digital forecasting input analog signal and converted education error signal sectional ADCS from analog convolution. It is shown that 12-bit CMOS ADC with project standards 0.18 micron provides high accuracy and speed of conversion to 600...1000 million samples/s when operating in hard conditions. Noted that through simple modifications considered architecture can increase the bit CMOS ADC to 14 bits.