13.3 A SAW-less reconfigurable multimode transmitter with a voltage-mode harmonic-reject mixer in 14nm FinFET CMOS

Bhagavatula, Venumadhav; Kwon, Do Young; Lee, Jun Ho; Bui, Quang-Diep; Choi, Jung-Joo; Lu, Siuchuang-Ivan; Son, Sangwon

doi:10.1109/isscc.2017.7870340

Cited by 20 publications

(8 citation statements)

References 2 publications

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“…15), which is subject to stringent constraints in terms of spurious emissions. In [22] and [23], it is shown that CIM3 can be improved by canceling the signal third harmonic at 3*fc-fBB, which intermodulates with the desired signal at fc+fBB, resulting in spurious emissions at fc-3*fBB, due to non-linearity.…”

Section: Resultsmentioning

confidence: 99%

Digital RF Transmitter With Single-Bit $\Delta\Sigma$ M-Driven Switched-Capacitor RF DAC and Embedded Band Filter in 28-nm FD-SOI

Marin¹,

Frappé²,

Stefanelli³

et al. 2019

IEEE Trans. Microwave Theory Techn.

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This paper presents a single-bit RF transmitter based on single-bit switched-capacitor RF digital-to-analog converters (DAC) embedded in an FIR filter (FIR-DAC). The transmitter system comprises a single-bit quadrature Delta-Sigma Modulator (ΔΣM), a digital mixer, and a 109-tap RF FIR-DAC stage with a single external inductor, combining D-A conversion with discrete and continuous time filtering. The onchip part of the FIR-DAC is built exclusively with CMOS inverters and Metal-Oxide-Metal (MOM) capacitors, which are implemented in the interconnect layers to propose a compact fully-digital solution, suitable for advanced CMOS nodes.A method for canceling redundant switching in the FIR-DAC is proposed to reduce its complexity and power consumption. Combining discrete and continuous-time filtering, the out-ofband quantization noise of the 1-bit RF signal is strongly attenuated below the level required by emission masks. The RF FIR-DAC prototype is implemented in 28nm FD-SOI CMOS technology with 10 metal layers and occupies a total active area of only 0.047 mm 2 . The overall power consumption is 38 mW at 4.6 dBm peak output power, 900 MHz carrier frequency and 1 V supply. FD-SOI body-bias Vt tuning is used to effectively correct mixing clock duty-cycle errors in order to perform precise highfrequency I/Q interleaving, which enables high image and local oscillator (LO) rejections. The resulting power consumption, surface and performance of the measured prototype make the proposed circuits and concepts particularly appropriate for use in emerging Internet of Things (IoT) applications.

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Section: Resultsmentioning

confidence: 99%

Digital RF Transmitter With Single-Bit $\Delta\Sigma$ M-Driven Switched-Capacitor RF DAC and Embedded Band Filter in 28-nm FD-SOI

Marin¹,

Frappé²,

Stefanelli³

et al. 2019

IEEE Trans. Microwave Theory Techn.

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“…Recently, the latest designs are fabricated in 16 nm or 14 nm Fin-FET CMOS [4,17]. The corresponding advantages of low voltage operation as well as drastically increased transit frequency and integration density are utilized for the realization of novel circuit design concepts, e.g.…”

Section: Simplified Lte-advanced Transceiver Architecturementioning

confidence: 99%

“…The corresponding advantages of low voltage operation as well as drastically increased transit frequency and integration density are utilized for the realization of novel circuit design concepts, e.g. in [4] where a specialized type of filter-less reconfigurable harmonic rejection mixer has been shown or [17] where a ultra-low power wide-band RX circuit for CA scenarios was demonstrated.…”

Section: Simplified Lte-advanced Transceiver Architecturementioning

confidence: 99%

From microwatt to gigabit: challenges of modern radio design

Pretl¹,

Faseth²,

Schumacher³

et al. 2018

Elektrotech. Inftech.

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On the brink of introducing the fifth generation (5G) of cellular networks, the art of radio-frequency (RF) integrated circuit design has never seen such a wide spread of diverging requirements:On the one hand, ubiquitous sensor networks are mandating power budgets in the order of micro-watt. They should be constructed as energy-autonomous, wireless, low-cost sensor nodes. This demand is caused by massive deployment scenarios of billions of devices, which makes wires and batteries unpractical. As a result, the desire for the radio nodes to harvest their operational energy from the environment emerges.On the other hand, the recent and ongoing realization of gigabit-per-second capable cellular modems is driving hardware and power requirements to extremes. To overcome hardware limitations, introduced by analog impairments, digital correction and alignment algorithms are employed for compensation. These factors call for usage of expensive advanced CMOS technology nodes and increased utilization of digital signal processing techniques.In this paper, we recap ongoing trends and developments for ultra-low power and high-end transceiver (TRX) designs using CMOS technology nodes ranging from low-cost to highest performance.Keywords: RF; ultra-low-power; wireless architectures; transceiver; mixed-signal circuits; 5G Von Mikrowatt zu Gigabit: Herausforderungen beim Design moderner Funkübertragungssysteme. Neben der Einführung der zellularen Mobilfunknetze der fünften Generation (5G) muss sich auch die integrierte HochfrequenzSchaltungstechnik einer noch nie dagewesenen Breite an unterschiedlichen Anforderungen stellen: Auf der einen Seite gibt es überall kabellose Sensornetzwerke, denen nur eine geringe Menge an Versorgungsleistung im MikrowattBereich zur Verfügung steht. Daher müssen die Chips in diesem Bereich energieautark und möglichst kostengünstig entwickelt werden. Aufgrund der zu erwartenden hohen Stückzahlen (Milliarden von unterschiedlichsten Sensoren für verschiedene Anwendungen) sind eine drahtgebundene Energieversorgung oder der Einsatz von Batterien in vielen Fällen praktisch unmöglich. Somit wird es für die Sensoren immer wichtiger, ihre Energieversorgung aus der Umgebung zu gewinnen (Stichwort Energy Harvesting).

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“…For this reason, analog-intensive transmitter architectures ( Fig. 1(a)) are still very popular and actively researched nowadays [1]- [6]. The main problem with these structures is that they do not significantly benefit from CMOS scaling, thus leading to large area consumption even in the most advanced process nodes.…”

Section: Introductionmentioning

confidence: 99%

“…The main problem with these structures is that they do not significantly benefit from CMOS scaling, thus leading to large area consumption even in the most advanced process nodes. This becomes evident by analyzing the chip micrographs of the circuits published in [1], [3]- [6], from where it can be noticed that the analog baseband section takes up to 50% of the total TX area.…”

Section: Introductionmentioning

confidence: 99%

All-Digital LTE SAW-Less Transmitter With DSP-Based Programming of RX-Band Noise

Roverato

Kosunen

Cornelissens³

et al. 2017

IEEE J. Solid-State Circuits

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We present the first all-digital LTE transmitter using programmable digital attenuation of RX-band noise. The system is architectured to fully exploit the speed and low cost of DSP logic in deep-submicron CMOS processes, without increasing at all the design effort of the RF circuitry. To achieve SAWless operation, the transmitter uses digital bandpass delta-sigma modulation and mismatch-shaping to attenuate the DAC noise at a programmable duplex distance. These functions can be implemented entirely within DSP, thus taking advantage of the standard digital design methodology. Furthermore, the fully digital RX-band noise shaping significantly relaxes the performance requirements on the RF front-end. Therefore, 10 bits of resolution for the D/A conversion are sufficient to achieve-160 dBc/Hz out-of-band noise, without need for digital predistortion, calibration or bulky analog filters. The transmitter was fabricated in 28nm CMOS, and occupies only 0.82 mm 2. Besides low outof-band noise, our system also demonstrates state-of-art linearity performance, with measured CIM3/CIM5 below-67 dBc, and ACLR of-61 dBc with LTE20 carrier. The circuit consumes 150 mW from 0.9/1.5V supplies at +3 dBm output power.

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13.3 A SAW-less reconfigurable multimode transmitter with a voltage-mode harmonic-reject mixer in 14nm FinFET CMOS

Cited by 20 publications

References 2 publications

Digital RF Transmitter With Single-Bit $\Delta\Sigma$ M-Driven Switched-Capacitor RF DAC and Embedded Band Filter in 28-nm FD-SOI

Digital RF Transmitter With Single-Bit $\Delta\Sigma$ M-Driven Switched-Capacitor RF DAC and Embedded Band Filter in 28-nm FD-SOI

From microwatt to gigabit: challenges of modern radio design

All-Digital LTE SAW-Less Transmitter With DSP-Based Programming of RX-Band Noise

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