21.4 An LTE-A Multimode Multiband RF Transceiver with 4RX/2TX Inter-Band Carrier Aggregation, 2-Carrier 4×4 MIMO with 256QAM and HPUE Capability in 28nm CMOS

Tang, Chia‐Chun; Lee, Yi-Bin; Sun, Chih-Hao; Lin, Cheng‐Chieh; Syu, Jin-Siang; Wu, Minhua; Chen, YangChuan; Chueh, Tzu-Chan; Bryant, Carl; Collados, M.; Hassan, Mohammed; Ramos, Juan Manuel Sánchez; Hsieh, Yu-Lin; Chen, Hsin-Hung; Guo, Xiaochuan; Chen, Hsin‐Hua; Cao, Changqing; Daniel, Li; Strange, Jon; Wang, Caiyi; Dehng, Guang-Kaai

doi:10.1109/isscc.2019.8662362

Cited by 22 publications

(3 citation statements)

References 4 publications

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“…1. It uses a 5 ps Time-to-Digital Converter (TDC) based on two 31-stage ring oscillators coupled together [6], [7] and a 3 rd order Σ∆ modulator for fractional synthesis with digital Σ∆ noise cancellation and adaptive TDC gain tracking (LMS). The DCO has 2 banks, a coarse Hopping bank (HOP) and a fine Tracking bank (TRK) with 0.9 MHz and 60 kHz resolution respectively.…”

Section: Adpll Architecture a Fast Hopping Methodsmentioning

confidence: 99%

A Fast Locking 5.8–7.2-GHz Fractional-N Synthesizer With Sub-2-us Settling in 22-nm FDSOI

Prinzie

Andrabi

Beghein

et al. 2020

IEEE Solid-State Circuits Lett.

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This letter presents a fast frequency hopping alldigital fractional-N synthesizer with linear frequency tuning word estimation and aggressive type-I and type-II loop settling. It has a linearized DCO allowing wide-band and closed-loop operation and employs digital zero-phase reset to reduce phase transients during switch over due to type-I settling. The DCO gain is equalized by exploiting routing inductances and a hybrid binarythermometric segmentation provides improved DNL performance for closed loop operation in a 5.8-7.2 GHz range. The circuit was processed in a 22 nm FDSOI technology and achieves a settling time below 2 µs in a 200 MHz hopping range.

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Section: Adpll Architecture a Fast Hopping Methodsmentioning

confidence: 99%

A Fast Locking 5.8–7.2-GHz Fractional-N Synthesizer With Sub-2-us Settling in 22-nm FDSOI

Prinzie

Andrabi

Beghein

et al. 2020

IEEE Solid-State Circuits Lett.

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“…Wideband LNTA input matching is achieved through capacitive feedback. Such band-separation approaches to support carrier aggregation and MIMO are also adopted in [25], which features 20 RX paths in 12 nm CMOS, achieves 600M-6 GHz operation and supports 6 inter-band CA. In this case, external LNAs are used to relax NF requirements in integrated RX.…”

Section: Wideband Interferer-tolerant Receivers With Current-mode Architecturesmentioning

confidence: 99%

Recent Developments in Integrated Interferer-Tolerant Receivers for Reconfigurable Radios

et al. 2021

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Fragmented spectrum allocations at RF and mm-Wave, increased use of carrier aggregation/MIMO and dense spectrum-reuse in wireless links has led to interest in the design of integrated wideband, high-linearity MIMO RX that provide low noise, blocker tolerance and reconfigurability across signal domains. In this paper, receive architectures for wide operating range and blocker tolerance are presented with a focus on recent developments in reconfigurable N-path receivers. Generalized sequence-mixing architectures that support reconfigurable frequency/spatial/code-domain rejection and filtering are described along with directions of research extending operation to wider bandwidths and higher frequencies.INDEX TERMS N-path filters, reconfigurable receivers, current-mode, passive mixers, sequence mixers, spatio spectral filtering, walsh function sequence based notch filters, blocker tolerant receivers, blocker tolerant MIMO, interference tolerant receivers.This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.

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“…Nevertheless, direct-conversion architectures are still preferred in commercial designs due to their superior RF performance and lower complexity [13], [14], [22].…”

Section: Trends In Rf Front-endsmentioning

confidence: 99%

A Survey of Self-Interference in LTE-Advanced and 5G New Radio Wireless Transceivers

Sadjina

Paireder

Huemer

et al. 2020

IEEE Trans. Microwave Theory Techn.

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This article presents a comprehensive survey of the literature on self-interference (SI) in long-term evolution advanced (LTE-A) and fifth-generation (5G) new radio transceivers and should serve the reader as a guide and starting point for further work on SI management. Current trends in cellular transceiver designs are discussed, and reasons why new technologies, such as carrier aggregation, cause potential sensitivity degradation due to self-interfering signals are highlighted. The survey provides an overview of the most common interference mechanisms and continues with a taxonomy on SI mitigation architectures by comparing the strengths and weaknesses of various techniques.

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21.4 An LTE-A Multimode Multiband RF Transceiver with 4RX/2TX Inter-Band Carrier Aggregation, 2-Carrier 4×4 MIMO with 256QAM and HPUE Capability in 28nm CMOS

Cited by 22 publications

References 4 publications

A Fast Locking 5.8–7.2-GHz Fractional-N Synthesizer With Sub-2-us Settling in 22-nm FDSOI

A Fast Locking 5.8–7.2-GHz Fractional-N Synthesizer With Sub-2-us Settling in 22-nm FDSOI

Recent Developments in Integrated Interferer-Tolerant Receivers for Reconfigurable Radios

A Survey of Self-Interference in LTE-Advanced and 5G New Radio Wireless Transceivers

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