28.3: A Shared Column‐Line Driving Method for High Pixel Density

Abstract

We have developed Shared Column-Line Driving (SCLD) method, by which the number of data driver LSIs is reduced to a half of conventional ones without doubling the number of gate lines. This paper shows the concept and system configuration of the SCLD method which can be applied for high pixel density and low cost TFT-LCDs. . IntroductionThese days active matrix liquid crystal displays(AMLCDs) have been widely used for many applications. And its resolution is becoming higher. In other words, pixel pitch is becoming smaller. However, tape carrier package(TCP) and tape automated bonding(TAP) techniques do not satisfy the small and fine pitch characteristics for the small size and high resolution applications such as cellular phones and personal digital equipments. Therefore, there are lots of researches about package of AMLCD such as chip on glass(COG) to overcome the pitch limitation of TCP and TAP. And also, there was a research to increase the resolution of AMLCD without change of package types and bonding technologies. It was the half-column-line driving method which was proposed for reducing the power consumption and module cost, originally[1].This driving method can reduce the number of column driver LSIs by which each column line drives both pixels on its right and left sides and reduce the power consumption of column drivers in the module to a half but its panel has twice as many gate lines as those of a conventional one. These doubled gate lines decrease the aperture ratio and the rearranged of video data as zig-zag sequence increase the complexity of controller and digital data rate between frame memory and controller and also slightly increase the module cost because of double numbered gate driver.And two pixel are driven in one horizontal line time, it has not enough line time to drive the high resolution TFT-LCDs. To eliminate this problem, we propose a Shared Column-Line Driving(SCLD) method. In this paper, we describe the concept, and operation principle of the proposed pixel structure, and architectures and configurations of scan driver and data driver for implementation of the proposed SCLD method. Pixel Structure of SCLD MethodThe pixel array for the proposed SCLD method is shown in Fig. 1. The proposed SCLD method can reduce the number of column lines by half of the conventional LCD panel without increasing the number of gate lines. One column line is connected to the both side pixels on its right and left sides. Two pixel TFTs in the right side of the column line connected to N-th gate line. In the left side of the column line, one pixel TFT is connected to the N-th gate line and the other is connected to (N+1)-th gate line. And two series connected TFTs of right pixel, those gate are connected N-G1 G2 G3 G4 D1 D2 Figure 1. The pixel structure of the proposed shared columnline driving method. G2 G3 G1 1st H 2nd H a b Vdd gnd positive video range negative video range D1 Vcom Figure 2. The waveform of the scan pulse and driving sequence of the proposed SCLD method.th gate line, are reduced to one T...

42.1: Invited Paper: Display Electronics Required for AMLCDs with Pixel Level Data‐Line Multiplexing

“…After turning off the potential of gate-line G(n+2), during t2, pixel-A maintains the previous potential, and pixel-B is charged with an independent potential of D(m). The potentials of pixels-C and D are The major advantages of this configuration in comparison with similar configurations [5][6][7] are: (1) smaller sized TFTs with a single source-to-drain connection from the data-line to the pixel, and (2) applicability to a Cs-on-gate structure. Those techniques [5][6][7] require two TFTs connected in series between the data-line and the pixel, and independent storage capacitor (Cs) because the pixel lies between two addressing gate-lines.…”

“…With the new configuration we proposed last year [8], new AMLCDs have almost the same aperture ratio in the pixels as conventional AMLCDs. Although this scheme is different from the three similar configurations [5][6][7], the addressing logic, that is the waveform of gate signals, is the same.…”

“…Although trials in the reduction of the number of required data driver-chips have been proposed by many parties since early 90's, all these proposals have the following disadvantages: they require increasing the number of gate driver-chips [1], poly-crystalline silicon technology [2,3], a special scaling graphics controller [4], or series TFTs with multiple gates and independent storage capacitors [5][6][7] that decrease aperture ratio of the pixel.…”

P‐240L: Late‐News Poster: Advanced Design of a‐Si Gate Driver and Data Line Multiplexing for Low Cost and Low Power TFT‐LCDs

“…Although the above scheme can be achieved by adopting low temperature poly silicon (LTPS) process easily, the fabricating cost and yield still limit its applications to small size panels. The data line multiplexing methods based on the amorphous silicon (a-Si) process had been announced in many literatures [1][2][3][4]. In this paper, we have proposed the panel architecture with data line multiplexing and integrated gate drivers manufactured by using a-Si TFTs.…”

16.2: Advanced TFT-LCD Data Line Reduction Method

“…One of the most critical aspects of those products is cost. Since driver ICs greatly contribute to the cost of TFT-LCD panels, various attempts to reduce the number of drivers have been proposed by many companies and academics [1,2]. Figure 1 shows the pixel array of a conventional TFT-LCD panel.…”