31.3 nW, 0.5 V Bulk-Driven OTA for Biosignal Processing

Kumngern, Montree; Kulej, Tomasz; Khateb, Fabian

doi:10.1109/access.2023.3279727

Cited by 6 publications

(2 citation statements)

References 45 publications

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“…from Eqs. (1) (2). At this point gmt3≈2gmp≈gmt1, gm3 is the total transconductance when the circuit operates in region 3.…”

Section: Overall Structurementioning

confidence: 98%

“…In this study, a low offset voltage constant transconductance rail-to-rail operational amplifier is designed as a buffer amplifier for a DAC based on the UMC 40nm technology. The DAC' output buffer circuit not only isolates interference from external loads on the linear resistor network but also enables the DAC to efficiently drive resistive loads [1][2][3][4] .…”

Section: Introductionmentioning

confidence: 99%

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Design of low-offset constant transconductance rail-to-rail operational amplifier

Lei,

Zhu,

Lin

et al. 2024

Third International Conference on Computer Technology, Information Engineering, and Electron Materials (CTIEEM 2023)

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An operational amplifier based on UMC 40nm process is designed. PMOS and NMOS differential pairs are adopted in the input stage of the circuit to achieve rail-to-rail input, and the minimum current selection circuit is used to reduce the change rate of the transconductance of the input stage. The gain stage adopts a common source common gate structure. In order to obtain full swing output, class AB output stages are adopted, and the output MOS is biased by feedback technology. The CMRR of 85 . 1 4 dB and PSRR of 85 . 8 6 dB can be obtained. The open-loop gain is 90 dB, the phase margin is about 83°, the unit-gain bandwidth product is 15.84MHz, and the offset voltage is 283.9nV.

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“…from Eqs. (1) (2). At this point gmt3≈2gmp≈gmt1, gm3 is the total transconductance when the circuit operates in region 3.…”

Section: Overall Structurementioning

confidence: 98%

Section: Introductionmentioning

confidence: 99%

Design of low-offset constant transconductance rail-to-rail operational amplifier

Lei,

Zhu,

Lin

et al. 2024

Third International Conference on Computer Technology, Information Engineering, and Electron Materials (CTIEEM 2023)

View full text Add to dashboard Cite

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Bulk-driven CMOS linear transconductance-cell for AC amplifiers with very low cut-off frequency

Ocampo-Hidalgo,

Domínguez,

De La Cruz-Blas

et al. 2023

AEU - International Journal of Electronics and Communications

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On the Feasibility of Cascode and Regulated Cascode Amplifier Stages in ULV Circuits Exploiting MOS Transistors in Deep Subthreshold Operation

Della Sala,

Centurelli,

Monsurró

et al. 2024

IEEE Access

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In the last years several ultra-low voltage (ULV) operational transconductance amplifiers (OTAs) with supply voltages below 0.5V have been proposed in the literature. To achieve high gain, multistage amplifiers are frequently exploited, in spite of the complexity of design and compensation approaches, whereas cascode and regulated-cascode OTA topologies have rarely been exploited to implement ULV amplifiers. On the other hand, most ULV amplifiers are designed for IoT and biomedical applications in which reducing power consumption is the most important specification, and MOS devices are operated in the subthreshold region. This paper focuses on exploiting the subthreshold operating region to design ULV single-stage OTAs that utilize an output cascoded branch to increase the equivalent output resistance and, consequently, the overall voltage gain. A detailed analytical study of the conditions for triode and saturation regions for MOS devices operating in deep subthreshold region is presented to demonstrate that, for an appropriate choice of the inversion coefficient (IC), a cascode configuration exhibits higher gain than a single transistor, for the same voltage overhead, even in ULV conditions. More specifically, the results presented in this work demonstrate that 4 MOS devices (2 NMOS and 2 PMOS) can be reliably stacked to build a complementary cascode amplifier, even with a supply voltage as low as 0.4V. We also present a novel topology of regulated-cascode amplifier suitable to be operated with a supply voltage of 0.4V and a voltage gain approaching 100dB. Simulation results referring to a 180nm CMOS technology and including PVT and mismatch variations confirm state-of-the-art performances, as well as the good robustness of the proposed regulated-cascode ULV OTA.

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31.3 nW, 0.5 V Bulk-Driven OTA for Biosignal Processing

Cited by 6 publications

References 45 publications

Design of low-offset constant transconductance rail-to-rail operational amplifier

Design of low-offset constant transconductance rail-to-rail operational amplifier

Bulk-driven CMOS linear transconductance-cell for AC amplifiers with very low cut-off frequency

On the Feasibility of Cascode and Regulated Cascode Amplifier Stages in ULV Circuits Exploiting MOS Transistors in Deep Subthreshold Operation

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