3200 ppi Matrix-Addressable Blue MicroLED Display

Wu, Meng‐Chyi; Chung, Myung-Jin; Wu, Cheng-Yeu

doi:10.3390/mi13081350

Cited by 17 publications

(5 citation statements)

References 39 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…[39] However, it should be acknowledged that the potential of typical QW LEDs for further improvement is limited, which can be seen from Figure 3e where results on QW LEDs reported in the technical literature are summarized. [40][41][42][43][44][45][46][47][48][49][50][51] Even for largesize SSL LEDs fabricated under state-of-the-art techniques where size-dependent effect can be neglected, the J PEAK (several A cm −2 ) is still far higher than the expected working current density for Micro-LEDs. This is partially because carriers tend to form Wannier excitons (rather than Frenkel excitons in GaN-based materials), where the carrier interaction is much looser than that in OLEDs so that a large n cannot be achieved naturally.…”

Section: Carrier Recombination At Low Current Densitymentioning

confidence: 99%

Dennard Scaling in Optoelectronics: Scientific Challenges and Countermeasures of Micro‐LEDs for Displays

Wang

Hao

et al. 2022

Laser & Photonics Reviews

View full text Add to dashboard Cite

Scaling‐down is the most significant technical strategy to improve performance for microelectronic devices, which is first performed systematically by Robert H. Dennard for silicon integrated circuits. Its main idea is that device parameters such as doping and junction depth must be adjusted when shrinking the dimensions of a field‐effect transistor so that the power density can remain unchanged. Recently, miniaturization of light‐emitting diodes or “microscale light‐emitting diodes (Micro‐LEDs)” is gaining much attention because of their potential for superior display technologies. However, the scaling‐down of LEDs used for solid‐state lighting (SSL) results in extremely low efficiency devices, with the reasons and underlying device physics still unclear. Here the law of Micro‐LED scaling is proposed in analogy to Dennard scaling, through which new perspectives are provided to comprehensively understand the root cause of Micro‐LED inefficiency and the scientific challenges to be addressed for mass commercialization, including subthreshold radiation, size‐dependent effect, and the enhancement of carrier recombination at low current density.

show abstract

Section: Carrier Recombination At Low Current Densitymentioning

confidence: 99%

Dennard Scaling in Optoelectronics: Scientific Challenges and Countermeasures of Micro‐LEDs for Displays

Wang

Hao

et al. 2022

Laser & Photonics Reviews

View full text Add to dashboard Cite

show abstract

“…Meanwhile, its pixel pitch has reduced from the original 50 μm to below 10 μm today. Wu et al even presented an active matrix micro Micro-LED display with a resolution of 1920 × 1080 and a high pixel density of 3200 pixels per inch [16]. Although there has been a lot of research on Micro-LED display technology now, how to further reduce pixel pitch and reduce the cost of manufacturing high-resolution Micro-LED screens remains a challenge.…”

Section: Introductionmentioning

confidence: 99%

Fabrication and bonding of In bumps on Micro-LED with 8 μm pixel pitch

Jiang,

Chen,

Zhang

et al. 2024

Eng. Res. Express

View full text Add to dashboard Cite

Indium (In) is currently used to fabricate metal bumps on micro-light-emitting diode (Micro-LED) chips due to its excellent physical properties. However, as Micro-LED pixel size and pitch decrease, achieving high-quality In bumps on densely packed Micro-LED chips often presents more challenges. This paper describes the process of fabricating In bumps on micro-LEDs using thermal evaporation, highlighting an issue where In tends to grow laterally within the photoresist pattern, ultimately blocking the pattern and resulting in undersized and poorly dense In bumps on the Micro-LED chip. To address this issue, we conducted numerous experiments to study the height variation of In bumps within a range of photoresist aperture sizes (3 μm -7 μm) under two different resist thickness conditions (3.8 μm and 4.8 μm). The results showed that the resist thickness had a certain effect on the height of In bumps on the Micro-LED chip electrodes. Moreover, we found that, with the photoresist pattern size increasing under constant resist thickness conditions, the height and quality of the bumps significantly improved. Based on this finding, we rationalized the adjustment of the photoresist pattern size within a limited emission platform range to compensate for the height difference of In bumps caused by different resist thicknesses between the cathode and anode regions. Consequently, well-shaped and dense In bumps with a maximum height of up to 4.4 μm were fabricated on 8 μm pitch Micro-LED chips. Afterwards, we bonded the Micro-LED chip with indium bumps to the CMOS chip, and we found that we could successfully control the CMOS chip to drive the Micro-LED chip to display specific characters through the Flexible Printed Circuit (FPC). This work is of significant importance for the fabrication of In bumps on Micro-LED chips with pitches below 10 μm and subsequent bonding processes.

show abstract

“…With respect to singularly addressable light emitter sources, Orenstein and co-workers reached an important milestone in their pioneering work where matrix driven arrays with surface emitting laser diodes were developed [21][22][23][24] albeit for signal processing and optical communication. The further developments, which represent a significant step forward, were reported on the arrangement of LEDs in arrays [25][26][27][28][29][30][31] and the possibility to drive them preferably singularly (among others for displays) [32][33][34][35][36][37][38][39][40][41][42][43]. Hence, if all of these "ingredients/building blocks" are available within a lithography system, in principle, next generation lithography can be carried out mask-free, allowing time and resources savings, flexible structure patterning on demand.…”

Section: Introductionmentioning

confidence: 99%

Developments in Mask-Free Singularly Addressable Nano-LED Lithography

Mikulics,

Winden,

Mayer

et al. 2024

Nanomanufacturing

View full text Add to dashboard Cite

LED devices are increasingly gaining importance in lithography approaches due to the fact that they can be used flexibly for mask-less patterning. In this study, we briefly report on developments in mask-free lithography approaches based on nano-LED devices and summarize our current achievements in the different building blocks needed for its application. Individually addressable nano-LED structures can form the basis for an unprecedented fast and flexible patterning, on demand, in photo-chemically sensitive films. We introduce a driving scheme for nano-LEDs in arrays serving for a singularly addressable approach. Furthermore, we discuss the challenges facing nano-LED fabrication and possibilities to improve their performance. Additionally, we introduce LED structures based on a hybrid nanocrystal/nano-LED approach. Lastly, we provide an outlook how this approach could further develop for next generation lithography systems. This technique has a huge potential to revolutionize the field and to contribute significantly to energy and resources saving device nanomanufacturing.

show abstract

3200 ppi Matrix-Addressable Blue MicroLED Display

Cited by 17 publications

References 39 publications

Dennard Scaling in Optoelectronics: Scientific Challenges and Countermeasures of Micro‐LEDs for Displays

Dennard Scaling in Optoelectronics: Scientific Challenges and Countermeasures of Micro‐LEDs for Displays

Fabrication and bonding of In bumps on Micro-LED with 8 μm pixel pitch

Developments in Mask-Free Singularly Addressable Nano-LED Lithography

Contact Info

Product

Resources

About