60 GHz Double-Balanced Gate-Pumped Down-Conversion Mixers With a Combined Hybrid on 130 nm CMOS Processes

Lien, Chuen‐Der; Huang, Pei‐Chen; Kao, Kun-Yao; Lin, Kun-You; Wang, Huei

doi:10.1109/lmwc.2010.2040218

Cited by 13 publications

(7 citation statements)

References 6 publications

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“…These mixers showed good isolation between RF and LO ports associated with high power consumption which make these Gilbert-cell mixers not suitable for low power and low-voltage applications (Wang & Tsai, 2009). In contrast, the double-balanced gate mixers exhibit low supply voltage and low dc consumption (Lien et al, 2010). Compared to other double-balanced mixers, these mixers show low LO power, low noise figure and high conversion gain, and they have better isolations than the single-balanced gate mixers (Lien et al, 2010).…”

Section: Mixersmentioning

confidence: 99%

“…In contrast, the double-balanced gate mixers exhibit low supply voltage and low dc consumption (Lien et al, 2010). Compared to other double-balanced mixers, these mixers show low LO power, low noise figure and high conversion gain, and they have better isolations than the single-balanced gate mixers (Lien et al, 2010). The design in shows a 60-GHz quadrature balanced single-gate mixer implemented in 130 nm CMOS technology.…”

Section: Mixersmentioning

confidence: 99%

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Trends and Challenges in CMOS Design for Emerging 60 GHz WPAN Applications

Oualkadi¹

2011

Advanced Trends in Wireless Communications

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International audienceThe extensive growth of wireless communications industry is creating a big market opportunity. Wireless operators are currently searching for new solutions which would be implemented into the existing wireless communication networks to provide the broader bandwidth, the better quality and new value-added services. In the last decade, most commercial efforts were focused on the 1-10 GHz spectrum for voice and data applications for mobile phones and portable computers (Niknejad & Hashemi, 2008). Nowadays, the interest is growing in applications that use high rate wireless communications. Multigigabit- per-second communication requires a very large bandwidth. The Ultra-Wide Band (UWB) technology was basically used for this issue. However, this technology has some shortcomings including problems with interference and a limited data rate. Furthermore, the 3-5 GHz spectrum is relatively crowded with many interferers appearing in the WiFi bands (Niknejad & Hashemi, 2008). The use of millimeter wave frequency band is considered the most promising technology for broadband wireless. In 2001, the Federal Communications Commission (FCC) released a set of rules governing the use of spectrum between 57 and 66 GHz (Baldwin, 2007). Hence, a large bandwidth coupled with high allowable transmit power equals high possible data rates. Traditionally the implementation of 60 GHz radio technology required expensive technologies based on III-V compound semiconductors such as InP and GaAs (Smulders et al., 2007). The rapid progress of CMOS technology has enabled its application in millimeter wave applications. Currently, the transistors became small enough, consequently fast enough. As a result, the CMOS technology has become one of the most attractive choices in implementing 60 GHz radio due to its low cost and high level of integration (Doan et al., 2005). Despite the advantages of CMOS technology, the design of 60 GHz CMOS transceiver exhibits several challenges and difficulties that the designers must overcome. This chapter aims to explore the potential of the 60 GHz band in the use for emergent generation multi-gigabit wireless applications. The chapter presents a quick overview of the state-of-the-art of 60 GHz radio technology and its potentials to provide for high data rate and short range wireless communications. The chapter is organized as follows. Section 2 presents an overview about 60 GHz band. The advantages are presented to highlight the performance characteristics of this band. The opportunities of the physical layer of the IEEE 802.15.3c standard for emerging WPAN applications are discussed in section 3. The tremendous opportunities available with CMOS technology in the design of 60 GHz radio is discussed in section 4. Section 5 shows an example of 60 GHz radio system link. Some challenges and trade-offs on the design issues of circuits and systems for 60 GHz band are reported in section 6. Finally, section 7 presents the conclusion and some perspectives on future directions

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Section: Mixersmentioning

confidence: 99%

Section: Mixersmentioning

confidence: 99%

Trends and Challenges in CMOS Design for Emerging 60 GHz WPAN Applications

Oualkadi¹

2011

Advanced Trends in Wireless Communications

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“…The design procedure of the rat-race hybrid in [10, 11] is also complex. A combined hybrid is proposed in [12], but that double-balanced architecture still occupies a large area and has high dc power consumption. Moreover, the design considerations and procedures of a single-balanced gate-pumped mixer have not been described in detail in the literature.…”

Section: Introductionmentioning

confidence: 99%

A 1.2 V 15–32 GHz low-power single-balanced gate mixer with a miniature rat-race hybrid

Chen

Lien²,

Tsao

et al. 2012

Int. J. Microw. Wireless Technol.

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A 15–32 GHz miniature single-balanced gate mixer is proposed and analyzed. It achieves a smaller chip area with acceptable conversion gain and port-to-port isolation. In addition, the design procedure is described in detail. This mixer, fabricated in 90 nm digital CMOS technology, demonstrates a measured conversion loss of 1 dB and higher than 30 dB RF-to-LO port isolation from 17 to 32 GHz, at a local oscillator (LO) driver power of −4.3 dBm. The total dc power consumption is only 6 mW from a 1.2 V supply, including output buffer. The low dc power consumption and LO driver power reduce the power budget, and the proposed miniature rat-race hybrid facilitates integration in a receiver.

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“…[2][3][4] adopt various baluns to implement MMW mixers. A low-loss and high-isolation hybrid combiner is used for a gate-driven V-band mixer [5]. In this Letter, a Darlington-pair topology is employed to improve the cutoff frequency f T of the CMOS transistor.…”

mentioning

confidence: 99%

“…Introduction: Since the demand for low cost, high integration and high data-rate short-range wireless communication applications is progressively increasing, many studies of millimetre-wave (MMW) integrated circuits (ICs) have been reported [1][2][3][4][5]. To operate in MMW bands (Ka, V and W bands), advanced CMOS technologies such as 90/65/ 40 nm nodes are the prior choice to implement for the MMW ICs.…”

mentioning

confidence: 99%

V-band low-power Darlington-pair gate-pumped mixer with thin-film LC-hybrid linear combiner in 90 nm CMOS

2012

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Presented is a V-band low-power Darlington-pair double-balanced gate-pumped mixer with a thin-film (TF) LC-hybrid linear combiner in 90 nm CMOS technology. The compact TF LC-hybrid linear combiner is used to feed the differential RF and LO signals to a gatepumped mixer. Meanwhile, it provides high port-to-port isolations of the mixer. The proposed gate-pumped mixer achieves a 20.76 dB conversion gain, a 27 dBm 1 dB compression point, and a +8.5 dBm input IP3 under a low LO power of 22 dBm. The core power consumption is only 2.8 mW from a 1 V supply. The chip size with all testing pads and dummy blocks is only 0.52 mm 2 .Introduction: Since the demand for low cost, high integration and high data-rate short-range wireless communication applications is progressively increasing, many studies of millimetre-wave (MMW) integrated circuits (ICs) have been reported [1][2][3][4][5]. To operate in MMW bands (Ka, V and W bands), advanced CMOS technologies such as 90/65/ 40 nm nodes are the prior choice to implement for the MMW ICs. For a wireless communication system, the mixer is one of the components to determine key performances such as conversion gain (CG), bandwidth (BW), linearity, and isolation of the RF transceiver [1]. [2][3][4] adopt various baluns to implement MMW mixers. A low-loss and high-isolation hybrid combiner is used for a gate-driven V-band mixer [5]. In this Letter, a Darlington-pair topology is employed to improve the cutoff frequency f T of the CMOS transistor. Then, four Darlington-pairs are incorporated with a TF LC-hybrid linear combiner and IF output buffers to form a double balanced mixer in 90 nm CMOS technology.

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60 GHz Double-Balanced Gate-Pumped Down-Conversion Mixers With a Combined Hybrid on 130 nm CMOS Processes

Cited by 13 publications

References 6 publications

Trends and Challenges in CMOS Design for Emerging 60 GHz WPAN Applications

Trends and Challenges in CMOS Design for Emerging 60 GHz WPAN Applications

A 1.2 V 15–32 GHz low-power single-balanced gate mixer with a miniature rat-race hybrid

V-band low-power Darlington-pair gate-pumped mixer with thin-film LC-hybrid linear combiner in 90 nm CMOS

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