A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated voltage boost converter with MPPT for low-voltage energy harvesters

Ozaki, Toshihiro; Hirose, Takahisa; Nagai, Takahiro; Tsubaki, Keishi; Kuroki, Nobutaka; Numa, Masahiro

doi:10.1109/esscirc.2014.6942070

Cited by 21 publications

(16 citation statements)

References 14 publications

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“…The small-signal output resistance for both GD and BD transistors is identical, and given by Eq. (12).…”

Section: Bulk-driven Design Approachmentioning

confidence: 99%

“…It can be observed that effective voltage V EFF in relation to R ON acts as argument of exponential function located in denominator, which implicates the substantial sensitivity to change of this quantity. In order to overcome this issue, many techniques such as dynamic control, feed-forward biasing of the bulk electrode, multistage topology, implementation of charge transfer switches (CTS) parallel with pass gate switches (PGS) or backward control of the previous stage by body electrode voltage can be included in the low-voltage CPs design [11][12][13][14].…”

Section: Design Procedures Of Bd Charge Pumpmentioning

confidence: 99%

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Ultra-Low-Voltage IC Design Methods

Arbet¹,

Nagy²,

Stopjaková³

2020

Integrated Circuits/Microchips

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The emerging nanoscale technologies inherently offer transistors working with low voltage levels and are optimized for low-power operation. However, these technologies lack quality electronic components vital for reliable analog and/or mixed-signal design (e.g., resistor, capacitor, etc.) as they are predominantly used in high-performance digital designs. Moreover, the voltage headroom, ESD properties, the maximum current densities, parasitic effects, process fluctuations, aging effects, and many other parameters are superior in verified-by-time CMOS processes using planar transistors. This is the main reason, why low-voltage, low-power high-performance analog and mixed-signal circuits are still being designed in mature process nodes. In the proposed chapter, we bring an overview of main challenges and design techniques effectively applicable for ultra-low-voltage and low-power analog integrated circuits in nanoscale technologies. New design challenges and limitations linked with a low value of the supply voltage, the process fluctuation, device mismatch, and other effects are discussed. In the later part of the chapter, conventional and unconventional design techniques (bulk-driven approach, floating-gate, dynamic threshold, etc.) to design analog integrated circuits towards ultra-low-voltage systems and applications are described. Examples of ultra-low-voltage analog ICs blocks (an operational amplifier, a voltage comparator, a charge pump, etc.) designed in a standard CMOS technology using the unconventional design approach are presented.

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“…The small-signal output resistance for both GD and BD transistors is identical, and given by Eq. (12).…”

Section: Bulk-driven Design Approachmentioning

confidence: 99%

Section: Design Procedures Of Bd Charge Pumpmentioning

confidence: 99%

Ultra-Low-Voltage IC Design Methods

Arbet¹,

Nagy²,

Stopjaková³

2020

Integrated Circuits/Microchips

View full text Add to dashboard Cite

show abstract

“…However each feedback signal will incur additional power losses and therefore these should be kept to a minimum. In [8][9], two converters were presented with MPPT function operated by sensing only the output voltage eliminating the requirement of a multiplier. Furthermore, voltage sensing tends to incur less losses than current sensing [10] and so this was the approach adopted in the proposed MPPT design.…”

Section: Design Considerations Of the Mpptmentioning

confidence: 99%

A CMOS MPPT power conditioning circuit for energy harvesters

Galea

Casha

Grech

et al. 2017

2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)

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This paper presents the design of an ultra-low power consumption power conditioning circuit with an analogue maximum power point tracker to maximize the scavenged power generated by energy harvesting devices. Excess power is stored in a large storage capacitor to be used once the power generated by the harvester falls below the power required by the load. The circuit was designed to work with various types of energy harvesters such as solar cells and piezoelectric devices, thus making it compatible with both AC and DC input voltages. The AC/DC-to-DC converter topology employed, does not make use of any rectifier, in order to maximize the power efficiency of the converter. This power conditioner was designed using the AMS High Voltage 0.35 µm CMOS technology. The power conditioner cold starts with a minimum input voltage of 1 V and can subsequently operate with a wide voltage range of 0.2 V to 50 V to be compatible with various types of harvesters. It consumes 250 nW and can work with harvesters capable of generating power in the microwatt and milliwatt range.

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“…As another example of emerging multiple-supply systems, battery-less VLSI sytems have been reported [2], [3]. Such systems are expected to expand the market greatly over next decade.…”

Section: Introductionmentioning

confidence: 99%

A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs

Matsuzuka

Hirose

Shizuku

et al. 2015

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

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In this paper, we propose a low-power level shifter (LS) capable of converting extremely low-input voltage into highoutput voltage. The proposed LS consists of a pre-amplifier with a logic error correction circuit and an output latch stage. The pre-amplifier generates complementary amplified signals, and the latch stage converts them into full-swing output signals. Simulated results demonstrated that the proposed LS in a 0.18-µm CMOS process can convert a 0.19-V input into 1.8-V output correctly. The energy and the delay time of the proposed LS were 0.24 pJ and 21.4 ns when the low supply voltage, high supply voltage, and the input pulse frequency, were 0.4, 1.8 V, and 100 kHz, respectively.

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A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated voltage boost converter with MPPT for low-voltage energy harvesters

Cited by 21 publications

References 14 publications

Ultra-Low-Voltage IC Design Methods

Ultra-Low-Voltage IC Design Methods

A CMOS MPPT power conditioning circuit for energy harvesters

A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs

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