A 128×128 Current-Mode Ultra-High Frame Rate ISFET Array for Ion Imaging

Zeng, Junming; Miscourides, Nicholas; Georgiou, Pantelis

doi:10.1109/iscas.2018.8351178

Cited by 18 publications

(5 citation statements)

References 15 publications

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“…Analogue multiplexers are electronic devices that select one input signal from many and route it to a single output. They are widely used in a wide range of applications, including data acquisition systems, signal processing, and communication systems [ 102 , 103 , 104 , 105 , 106 , 107 ]. Analogue multiplexers can be built with a variety of technologies, including bipolar junction transistors (BJTs), field-effect transistors (FETs), metal oxide semiconductors (MOS) and OTFTs.…”

Section: Multiplexing Sensor Signalmentioning

confidence: 99%

Dual-Gate Organic Thin-Film Transistor and Multiplexer Chips for the Next Generation of Flexible EG-ISFET Sensor Chips

Rezaee

Carrabina

2023

Sensors

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Ion-sensitive field-effect transistors (ISFETs) are used as elementary devices to build many types of chemical sensors and biosensors. Organic thin-film transistor (OTFT) ISFETs use either small molecules or polymers as semiconductors together with an additive manufacturing process of much lower cost than standard silicon sensors and have the additional advantage of being environmentally friendly. OTFT ISFETs’ drawbacks include limited sensitivity and higher variability. In this paper, we propose a novel design technique for integrating extended-gate OTFT ISFETs (OTFT EG-ISFETs) together with dual-gate OTFT multiplexers (MUXs) made in the same process. The achieved results show that our OTFT ISFET sensors are of the state of the art of the literature. Our microsystem architecture enables switching between the different ISFETs implemented in the chip. In the case of sensors with the same gain, we have a fault-tolerant architecture since we are able to replace the faulty sensor with a fault-free one on the chip. For a chip including sensors with different gains, an external processor can select the sensor with the required sensitivity.

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Section: Multiplexing Sensor Signalmentioning

confidence: 99%

Dual-Gate Organic Thin-Film Transistor and Multiplexer Chips for the Next Generation of Flexible EG-ISFET Sensor Chips

Rezaee

Carrabina

2023

Sensors

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“…In the equivalent macro model on the right, Vtc represents any trapped charge in the passivation layer. The reference electrode is not integrated on chip but connected externally and placed inside the solution to provide biasing [20].…”

Section: Introductionmentioning

confidence: 99%

“…Lastly, Section VII concludes the paper. This paper is an extension of the work in [20], where Section II, III, IV are adopted from the original work.…”

Section: Introductionmentioning

confidence: 99%

“…Pixel configuration for a 1 µm / 1 µm ISFET sensor in current-mode including in-pixel reset. Vgs is defined by an external Vbias g and V ds is defined by an internal Vd[20].…”

mentioning

confidence: 99%

“…Circuit diagram of the complete signal pipeline[20]. Performance of the current conveyor under a simulated input full pH range variation, the top curve indicates the loop gain and the bottom curve shows the buffered current.…”

mentioning

confidence: 99%

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A 128 × 128 Current-Mode Ultra-High Frame Rate ISFET Array With In-Pixel Calibration for Real-Time Ion Imaging

Zeng

Kuang

Miscourides

et al. 2020

IEEE Trans. Biomed. Circuits Syst.

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An ultra-high frame rate and high spatial resolution ion-sensing Lab-on-Chip platform using a 128 × 128 CMOS ISFET array is presented. Current mode operation is employed to facilitate high-speed operation, with the ISFET sensors biased in the triode region to provide a linear response. Sensing pixels include a reset switch to allow in-pixel calibration for nonidealities such as offset, trapped charge and drift by periodically resetting the floating gate of the ISFET sensor. Current mode row-parallel signal processing is applied throughout the readout pipeline including auto-zeroing circuits for the removal of fixed pattern noise. The 128 readout signals are multiplexed to eight high-sample-rate on-chip current mode ADCs followed by an off-chip PCIe-based readout system on a FPGA with a latency of 0.15 s. Designed in a 0.35 µm CMOS process, the complete system-on-chip occupies an area of 2.6 × 2.2 mm 2 with a pixel size of 18 × 12.5 µm 2 and the whole system achieves a frame rate of 3000 fps which is the highest reported in the literature for ISFET arrays. The platform is demonstrated in the application of real-time ion-imaging through the high-speed visualization of sodium hydroxide (NaOH) diffusion in water at 60 fps on screen in addition to slow-motion playback of ion-dynamics recorded at 3000 fps. Index Terms-ISFET, ultra-high frame rate, linearity conversion, current mode, in-pixel calibration. Junming Zeng (S'17) received the Bachelor degree with first class honors in Electronic Engineering from the University of Southampton, UK in 2016, and the Master degree with Distinction in Analogue and Digital Integrated Circuit Design from Imperial College London, UK in 2017. He is currently a PhD student with Centre for Bio-Inspired Technology, Department of Electrical and Electronic Engineering, Imperial College London UK. His research interests include Analogue and Mixed Signal IC design and digital system design for biomedical applications. Specifically, he is now working on designing a CMOS Labon-Chip ultra-high speed ion imaging platform. He is the recipient of the Department PhD Scholarship from Imperial College London, and the awardee of the Best Student Paper Award 1st Prize at ISCAS 2018. Lei Kuang received the B.Sc. degree in Industrial electronics and control engineering from the Liverpool John Moores University, Liverpool, UK in 2016 and the M.Sc. degree in embedded systems from the University of Southampton, Southampton, UK in 2017. Then, he spent one year working as an embedded system design engineer in China's IC industry for SoC IP design and FPGA development. He is currently working toward his second M.Sc. degree in analog and digital integrated circuit design at Imperial College London, London, UK. His interests include high-speed and low-power digital system design, image processing and algorithm acceleration on FPGAs.

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