A 16-Bit Switched-Capacitor Sigma-Delta Modulator Matlab Model Exploiting Two-Step Quantization Process

Abstract

This paper presents a novel architecture of high-order single-stage sigma-delta (ΣΔ) converter for sensor measurement. The two-step quantization technique was utilized to design a novel architecture of ΣΔ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. The proposed architecture of switched-capacitor (SC) ΣΔ modulator was simulated with blocks containing nonidealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). The novel architecture of SC ΣΔ modulator with two-step quantization process was designed and simulated in MATLAB SIMULINK.