A 1V, Micropower System-on-Chip for Vital-Sign Monitoring in Wireless Body Sensor Networks

Wong, Alan; McDonagh, D.; Kathiresan, G.; Omeni, O.; Eljamaly, O.; Chan, Tatfu; Paddan, P.; Burdett, Alison

doi:10.1109/isscc.2008.4523095

Cited by 75 publications

(27 citation statements)

References 7 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Wearable and implantable biomedical systems [1][2][3][4][5] are advancing the development of healthcare. Such systems enable chronic disease management, medical diagnosis, and fitness tracking outside of a traditional clinical setting, thereby bringing a high quality-of-life to people with reduced costs.…”

Section: Acknowledgmentsmentioning

confidence: 99%

Ultra-Low-Power Analog-to-Digital Converters for Medical Applications

Zhang

2014

Linköping Studies in Science and Technology. Dissertations

View full text Add to dashboard Cite

Biomedical systems are commonly attached to or implanted into human bodies, and powered by harvested energy or small batteries. In these systems, analog-to-digital converters(ADCs) are key components as the interface between the analog world and the digital domain. Conversion of the low frequency bioelectric signals does not require high speed, but ultra-low-power operation. This combined with the required conversion accuracy makes the design of such ADCs a major challenge. Among prevalent ADC architectures, the successive-approximation-register (SAR) ADC exhibits significantly high energy efficiency due to its good trade-offs among power consumption, conversion accuracy, and design complexity. This thesis examines the physical limitations and investigates the design methodologies and circuit techniques for low-speed and ultra-low-power SAR ADCs.The power consumption of SAR ADC is analyzed and its lower bounds are formulated in the thesis. At low resolutions, power is bounded by minimum feature sizes; while at medium to high resolutions, power is bounded by thermal noise and capacitor mismatch. In order to relax the mismatch requirement on the capacitor sizing while still ensuring enough linearity for high resolution, a bottom-up weight calibration technique is further proposed. It utilizes redundancy generated by a non-binary-weighted capacitive network, and measures the actual weights of more significant capacitors using less significant capacitors.Three SAR ADCs have been implemented. The first ADC, fabricated in a 0.13µm CMOS process, achieves 9.1ENOB with 53-nW power consumption at 1kS/s. The main key to achieve the ultra-low-power operation turns out to be the maximal simplicity in the ADC architecture and low transistor count. In addition, a dual-supply voltage scheme allows the SAR digital logic to operate at 0.4V, reducing the overall power consumption of the ADC by 15% without any loss in performance. Based on the understanding from the first ADC and motivated by the predicted power bounds, the second ADC, a single-supply 9.1-ENOB SAR ADC in 65nm CMOS process has been further fabricated. It achieves a substantial (94%) improvement in power consumption with 3-nW total power at 1kS/s and 0.7V. Following the same concept of imposing maximal simplicity in the ADC architecture and taking advantage of the smaller feature size, the ultra-low-power consumption is achieved by a matched splitiv array capacitive DAC, a bottom-plate full-range input-sampling scheme, a latch-based SAR control logic, and a multi-V T design approach. The third ADC fabricated in 65nm CMOS process targets at a higher resolution of 14b and a wider bandwidth of 5KHz. It achieves 12.5ENOB with 1.98-µW power consumption at 0.8V and 10kS/s. To achieve the high resolution, the ADC implements a uniform-geometry non-binaryweighted capacitive DAC and employs a secondary-bit approach to dynamically shift decision levels for error correction. Moreover, a comparator with bias control utilizes the redundancy to reduce the power consumption....

show abstract

Section: Acknowledgmentsmentioning

confidence: 99%

Ultra-Low-Power Analog-to-Digital Converters for Medical Applications

Zhang

2014

Linköping Studies in Science and Technology. Dissertations

View full text Add to dashboard Cite

show abstract

“…The RF circuits typically dominate the power budget [1]- [3]; hence a receiver architecture that consumes the minimum amount of energy per received bit is desirable. A further concern, particularly in crowded unlicensed spectrum, is separation among users, for which frequency division multiplexing is a key technique proposed by the IEEE 802.15.6 Narrowband (NB) PHY for WBANs.…”

Section: Introductionmentioning

confidence: 99%

Multi-channel 180pJ/b 2.4GHz FBAR-based receiver

Nadeau

Paidimarri

Mercier

et al. 2012

2012 IEEE Radio Frequency Integrated Circuits Symposium

View full text Add to dashboard Cite

-A three-channel 2.4GHz OOK receiver is designed in 65nm CMOS and leverages MEMS to enable multiple sub-channels of operation within a band at a very low energy per received bit. The receive chain features an LNA/mixer architecture that efficiently multiplexes signal pathways without degrading the quality factor of the resonators. The single-balanced mixer and ultra-low power ring oscillator convert the signal to IF, where it is efficiently amplified to enable envelope detection. The receiver consumes a total of 180pJ/b from a 0.7V supply while achieving a BER=10 -3 sensitivity of −67dBm at a 1Mb/s data rate.Index Terms -Body sensor networks, CMOS, radio frequency integrated circuits, low power electronics, film bulk acoustic resonators, envelope detector.

show abstract

“…Some portable devices such as ECG holters can record the ECG signal lasting for about 24 hours, but the form factor issue makes it inconvenient for the users to carry such devices in their daily life. The emerging wireless body area sensor network (BASN) adopts the local sensor nodes and is able to provide long-term monitoring of biosignals [2]. However, to achieve a practical energy efficiency for the wireless sensors, the application-oriented on-sensor signal processing units are often required [3].…”

Section: Introductionmentioning

confidence: 99%

Architecture design of the multi-functional wavelet-based ECG microprocessor for realtime detection of abnormal cardiac events

Cheng

Chen

2012

2012 Annual International Conference of the IEEE Engineering in Medicine and Biology Society

View full text Add to dashboard Cite

Abstract-Most of the abnormal cardiac events such as myocardial ischemia, acute myocardial infarction (AMI) and fatal arrhythmia can be diagnosed through continuous electrocardiogram (ECG) analysis. According to recent clinical research, early detection and alarming of such cardiac events can reduce the time delay to the hospital, and the clinical outcomes of these individuals can be greatly improved. Therefore, it would be helpful if there is a long-term ECG monitoring system with the ability to identify abnormal cardiac events and provide realtime warning for the users. The combination of the wireless body area sensor network (BASN) and the on-sensor ECG processor is a possible solution for this application. In this paper, we aim to design and implement a digital signal processor that is suitable for continuous ECG monitoring and alarming based on the continuous wavelet transform (CWT) through the proposed architectures -using both programmable RISC processor and application specific integrated circuits (ASIC) for performance optimization. According to the implementation results, the power consumption of the proposed processor integrated with an ASIC for CWT computation is only 79.4µW. Compared with the single-RISC processor, about 91.6% of the power reduction is achieved.

show abstract

A 1V, Micropower System-on-Chip for Vital-Sign Monitoring in Wireless Body Sensor Networks

Cited by 75 publications

References 7 publications

Ultra-Low-Power Analog-to-Digital Converters for Medical Applications

Ultra-Low-Power Analog-to-Digital Converters for Medical Applications

Multi-channel 180pJ/b 2.4GHz FBAR-based receiver

Architecture design of the multi-functional wavelet-based ECG microprocessor for realtime detection of abnormal cardiac events

Contact Info

Product

Resources

About