2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)
DOI: 10.1109/isscc.2002.992944
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A 62Gb/s backplane interconnect ASIC based on 3.1Gb/s serial-link technology

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Cited by 8 publications
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“…While many complex solutions are presented in the literature [1][2][3][4][5] we have developed a simple, preemphasis technique with much lower power dissipation compared to reported solutions. The developed circuitry can effectively provide up to 3.125 Gb/s of throughput over lossy and noisy channels over distance of over 50cm of the FR-4 backplane.…”
Section: Introductionmentioning
confidence: 99%
“…While many complex solutions are presented in the literature [1][2][3][4][5] we have developed a simple, preemphasis technique with much lower power dissipation compared to reported solutions. The developed circuitry can effectively provide up to 3.125 Gb/s of throughput over lossy and noisy channels over distance of over 50cm of the FR-4 backplane.…”
Section: Introductionmentioning
confidence: 99%