A 9 ns 16 Mb CMOS SRAM with offset reduced current sense amplifier

Leakage Current Based Stabilization Scheme for Robust Sense-Amplifier Design for Yield Enhancement in Nano-scale SRAM

“…Hence, these techniques can not be directly applied to VMSA's in SRAM. Vt mismatch compensation schemes described for current mode sense amplifiers [10] are also not readily applicable for voltage mode sense amplifiers.…”

“…Fig. 14b also shows that, for a target tolerable value of the failure probability, the stabilization scheme allows an early firing of senseamp enable signal, which helps to reduce memory access time [4][5][6][7][8][9][10][11][12][13][14][15].…”

“…The Vt variation in the transistors in the SRAM cell causes in read, write, access and hold failures in the cell. On the other hand, the statistical variations in the device parameters also result in significant variation in the sensing delay (difference between the time sense-amplifier is turned "ON" and the time sense-amplifier outputs are available) of the sense amplifiers used in SRAMs and in the worst case may amplify the input signal in the wrong direction (functional failure due to incorrect sensing) [3][4][5][6][7][8][9][10]. Access failure in SRAM is defined as the reading of wrong data during the access of the memory array.…”

“…In SRAM, principally two types of sense amplifiers are used: (a) voltage mode and (b) current mode [3][4][5][6][7][8][9][10]. In this work, we focus on the Voltage Mode Sense Amplifiers (VMSA).…”

“…In this work, we focus on the Voltage Mode Sense Amplifiers (VMSA). We apply the proposed leakage current based stabilization technique to two different types of VMSA, namely, Current Latch based Sense Amplifiers (CLSA) and Voltage Latch based Sense Amplifiers (VLSA) [3][4][5][6][7][8][9][10] (Fig. 2).…”