A Broadband Folded Gilbert-Cell CMOS Mixer

Krcmar, M.; Spiegel, S.J.; Ellinger, Frank; Boeck, Georg

doi:10.1109/icecs.2007.4511117

Cited by 11 publications

(4 citation statements)

References 16 publications

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“…The double balanced mixer is designed in folded-Gilbert type as in Fig. 3 for the benefits of the sufficient voltage drops along transistors under a low supply voltage [9]. The mixer has a conversion gain in simulation of 20 dB in the range of 1-100 MHz.…”

Section: Proposed Sensing Systemmentioning

confidence: 99%

Spacial Resolution Enhancement for Integrated Magnetic Probe by Two-Step Removal of Si-Substrate Beneath the Coil

Mai-Khanh

Iizuka

Nakajima³

et al. 2015

IEEE Trans. Magn.

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This paper presents an enhancement of high spacial resolution magnetic probe for the applications of measuring magnetic fields emitted from cryptography micro-electronic devices. The on-chip sensing system includes a magnetic pick-up coil, three-stage low-noise amplifier, mixer, and low-pass filter. Noise problems are reduced by the proposal of using the down-conversion mixer. A two-step removal of Si-substrate (Si-SUBS) areas is also proposed by applying a focused-ion-beam process to avoid eddy currents that reduces the coil sensitivity. Four probe chips are fabricated in a 0.18 um CMOS five-metal layer process with different coil sizes and with/without Si-SUBS removals. Experimental results on a thin wire and micro-strip line show the proposed system achieves high spacial resolution and sensitivity for near-field magnetic scanning.

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Section: Proposed Sensing Systemmentioning

confidence: 99%

Spacial Resolution Enhancement for Integrated Magnetic Probe by Two-Step Removal of Si-Substrate Beneath the Coil

Mai-Khanh

Iizuka

Nakajima³

et al. 2015

IEEE Trans. Magn.

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“…Furthermore, three stacked transistors and a resistor R L imply a very high supply voltage is needed [2]. Reducing the supply voltage meets the requirements of low power consumption design but worsens the linearity performances at the same time, due to the voltage margin requirement is not enough.…”

Section: A Gilbert Mixermentioning

confidence: 99%

A 2.4 GHz Low Voltage Low Power Folded Down-Conversion Quadrature Mixer Design<sup></sup>

Li¹,

Li²,

Wu³

et al. 2013

AMR

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This paper introduces a 2.4 GHz down-conversion quadrature mixer which applied in the Wireless Sensor Network (WSN). The mixer uses a folded structure which is modified based on the conventional Gilbert mixer. It is designed in 0.18μm RF CMOS process with a low supply voltage of 1V. The post-simulation results show that the mixer achieves a conversion gain (CG) of 9.0dB, the input 1dB compression point (IP1dB) of-7.6dBm, the third-order input intercept point (IIP3) of 2.2dBm, and the single side-band (SSB) noise figure (NF) is 13.9dB. The mixer core consumes current about 1.2mA from a 1V power supply.

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“…A folded Gilbert cell-based mixer with a current-bleeding technique is proposed for 2.4 GHz and 5.2 GHz frequencies [21]. A folded downconversion Gilbert cell mixer in 0.13 μm CMOS technology is proposed for 5-6 GHz frequency band [22]. A low-voltage down-conversion mixer using folded Gilbert cell topology is presented in 0.13 μm CMOS technology for UWB band of 3-7 GHz [23].…”

Section: Introductionmentioning

confidence: 99%

Low‐Voltage Low Noise Figure Down‐Conversion Mixer for Band #1 of MB‐OFDM System in 180 nm Complementary Metal Oxide Semiconductor Technology

Chaturvedi

Kumar

Meena

et al. 2022

Journal of Nanomaterials

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Low-voltage design is a challenge for Gilbert cell-based mixers due to stacking transconductance and switching stage. This work addresses this issue by proposing a design of a low-voltage down-conversion mixer for band #1 of multiband orthogonal frequency division multiplexing (MB-OFDM) system in 180 nm complementary metal oxide semiconductor (CMOS) technology. The mixer is tuned at band #1 at RF frequency of 3.432 GHz and IF frequency of 264 MHz. The proposed mixer uses folded cascode connection of LO and RF in order to increase headroom and to reduce the DC supply voltage for low-voltage operation. Common gate configuration is used at RF transconductance stage to enhance the input bandwidth of the mixer. RF and LO ports are matched to 50 Ω using differential T and LC matching, respectively. The resistive source denegation technique is used to linearize transconductance with respect to the bias point. The common source stage is used at the IF port as a buffer cum matching circuit it. The simulation results of the mixer show the maximum conversion gain of 9.76 dB, 1 dB compression point (P1dB) of -16.25 dBm, the third-order input intercept point (IIP3) of -4.70 dBm, an SSB noise figure of 9.036 dB, and S11of -19.490 dB at the supply voltage of 1.2 V. Excluding off chip components, proposed mixer records an active area of 926.35 μm2.

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A Broadband Folded Gilbert-Cell CMOS Mixer

Cited by 11 publications

References 16 publications

Spacial Resolution Enhancement for Integrated Magnetic Probe by Two-Step Removal of Si-Substrate Beneath the Coil

Spacial Resolution Enhancement for Integrated Magnetic Probe by Two-Step Removal of Si-Substrate Beneath the Coil

A 2.4 GHz Low Voltage Low Power Folded Down-Conversion Quadrature Mixer Design<sup></sup>

Low‐Voltage Low Noise Figure Down‐Conversion Mixer for Band #1 of MB‐OFDM System in 180 nm Complementary Metal Oxide Semiconductor Technology

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