A CMOS frequency synthesizer with an injection-locked frequency divider for a 5-GHz wireless LAN receiver

Rategh, H.R.; Samavati, H.; Lee, T.H.

doi:10.1109/4.841507

Cited by 198 publications

(58 citation statements)

References 15 publications

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“…5 The proof is omitted in the interest of brevity. 6 Similar to formulae for fundamental harmonic IL [20]. (18) in any way) is precise.…”

Section: ) the M Th Harmonic Of The Ppv Enables M Th Sub-harmonic Lockmentioning

confidence: 89%

“…Thus, the Adlerized SHIL equation (18), together with computational tools for determining the PPV's harmonics [17], provides concrete design guidelines for utilizing SHIL. 3) Analytical lock range formulae for sinusoidal inputs: When the injected signal is purely sinusoidal (i.e., c k ≡ 0, ∀k = ±1), as it can be in applications, g(θ ) becomes purely sinusoidal too, enabling simple analytical formulae to be derived that express the SHIL lock range ∆ f f in terms of injection amplitude, and vice-versa 6 . The relationship stands as…”

Section: ) the M Th Harmonic Of The Ppv Enables M Th Sub-harmonic Lockmentioning

confidence: 99%

“…It is also possible, however, for oscillators to phase-lock at a frequency that is an exact integral sub-multiple of the frequency of the externally applied signal; this is termed subharmonic IL (or SHIL, described further in Sec. II-B) and is useful in frequency division applications [6], [7]. Design of circuits exploiting SHIL has tended to rely predominantly on trial-and-error based methodologies, using brute-force transient simulations to assess impact on SHIL-based circuit function.…”

Section: Introductionmentioning

confidence: 99%

“…The phenomenon, together with the related effect of injection pulling, has often been regarded as an unwanted disturbance, causing, among other things, malfunction in serial clock/data recovery, increased timing jitter and clock skew, increased BER in communications, etc.. Over the years, however, IL has also been put to good use in electronics -e.g., for quadrature signal generation [4]; for microwave generators in laser optics [5]; for fast, low-power frequency dividers [6]; and in PLLs [7] and wireless sensor networks [8]. Moreover, IL is an important enabling mechanism in biology (e.g., [9], [10]).…”

mentioning

confidence: 99%

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Analysis and design of sub-harmonically injection locked oscillators

Neogy

Roychowdhury

2012

2012 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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Abstract-Sub-harmonic injection locking (SHIL) is an interesting phenomenon in nonlinear oscillators that is useful in RF applications, e.g., for frequency division. Existing techniques for analysis and design of SHIL are limited to a few specific circuit topologies. We present a general technique for analysing SHIL that applies uniformly to any kind of oscillator, is highly predictive, and offers novel insights into fundamental properties of SHIL that are useful for design. We demonstrate the power of the technique by applying it to ring and LC oscillators and predicting the presence or absence of SHIL, the number of distinct locks and their stability properties, lock range, etc.. We present comparisons with SPICElevel simulations to validate our method's predictions.is a nonlinear phenomenon in which a self-sustaining oscillator's phase becomes precisely locked (i.e., entrained or synchronized) to that of an externally applied signal. The phenomenon, together with the related effect of injection pulling, has often been regarded as an unwanted disturbance, causing, among other things, malfunction in serial clock/data recovery, increased timing jitter and clock skew, increased BER in communications, etc.. Over the years, however, IL has also been put to good use in electronics -e.g., for quadrature signal generation [4]; for microwave generators in laser optics [5]; for fast, low-power frequency dividers [6]; and in PLLs [7] and wireless sensor networks [8]. Moreover, IL is an important enabling mechanism in biology (e.g., [9], [10]). When an oscillator locks to an external signal whose frequency is close to the oscillator's natural frequency, the phenomenon is termed fundamental harmonic IL. It is also possible, however, for oscillators to phase-lock at a frequency that is an exact integral sub-multiple of the frequency of the externally applied signal; this is termed subharmonic IL (or SHIL, described further in Sec. II-B) and is useful in frequency division applications [6], [7]. Design of circuits exploiting SHIL has tended to rely predominantly on trial-and-error based methodologies, using brute-force transient simulations to assess impact on SHIL-based circuit function. Existing analyses of fundamental and sub-harmonic IL (e.g., [11], [2], [12]) have been limited to very specific circuit topologies (e.g., LC oscillators), while more general analyses [13], that apply to any kind of oscillator, do not consider SHIL. The work of Daryoush et. al. [14] presented a computationally complicated method limited to negative feedback oscillators, and provided no insights about multiple lock states for SHIL. To our knowledge, there is no general analysis or theory that provides the correct design intuition and predictive power for SHIL and related phenomena. In this paper, we develop and validate a general method for analysing and understanding sub-harmonic injection locking. The method applies to any self-sustaining, amplitude-stable oscillator, not only from electronics but also from other domains such as biology. ...

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“…5 The proof is omitted in the interest of brevity. 6 Similar to formulae for fundamental harmonic IL [20]. (18) in any way) is precise.…”

Section: ) the M Th Harmonic Of The Ppv Enables M Th Sub-harmonic Lockmentioning

confidence: 89%

Section: ) the M Th Harmonic Of The Ppv Enables M Th Sub-harmonic Lockmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

mentioning

confidence: 99%

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Analysis and design of sub-harmonically injection locked oscillators

Neogy

Roychowdhury

2012

2012 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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“…Amplifiers A1 and A2 are adopted to reduce reference spur induced by current mismatch and charge sharing. The unity gain amplifier A2 is used to prevent the node n2 from drifting to the rails when neither of the Up and Dn signals is active, and A2 also manages to keep n1 and n2 at the same potential and thus reduce charge sharing [10]. To improve matching between the up current (Iup) and the down current (Idn), amplifier A1 is introduced.…”

Section: Improved Charge-averaging Charge Pumpmentioning

confidence: 99%

A 6.6 GHZ Quadrature Frequency Synthesizer With -78 DBC Reference Spur for Uwb Application

Wang¹,

Wang²,

Liu³

et al. 2017

PIER C

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Abstract-An integer-N quadrature frequency synthesizer for single-band UWB application was designed in 0.18 µm CMOS technology. A modified bottom-series quadrature voltage-controlled oscillator (QVCO) based on reconfigurable LC tank is employed to provide quadrature signals and cover a range from 6.48 GHz to 7.07 GHz. In order to suppress the reference spur levels, an improved charge-averaging charge pump and a highly linear phase-frequency detector (PFD) are used. From the carrier of 6.6 GHz, the measured reference spur is −78.2 dBc, and the measured phase noise is −115.4 dBc/Hz at 1 MHz offset. The frequency synthesizer including buffers consumes a total power of 99 mW from a 1.8 V power supply. Chip size is 1.6 mm × 0.9 mm.

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