A CMOS neural network for pattern association

Walker, M.; Hasler, P.; Akers, L.A.

doi:10.1109/40.45828

Cited by 7 publications

(1 citation statement)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Switched capacitor circuits [141] have been used in the past to implement synaptic function [142], [143] as well as large-scale neuromorphic chips with different neuronal dynamics [132]. Recently, switched capacitors have also been used to implement a discrete time version of the SDSP algorithm [52] with stop learning feature.…”

Section: Switched Capacitor Synapsementioning

confidence: 99%

Low-Power, Adaptive Neuromorphic Systems: Recent Progress and Future Directions

Basu

Acharya

Karnik

et al. 2018

IEEE J. Emerg. Sel. Topics Circuits Syst.

106

View full text Add to dashboard Cite

In this paper, we present a survey of recent works in developing neuromorphic or neuro-inspired hardware systems.In particular, we focus on those systems which can either learn from data in an unsupervised or online supervised manner. We present algorithms and architectures developed specially to support on-chip learning. Emphasis is placed on hardware friendly modifications of standard algorithms, such as backpropagation, as well as novel algorithms, such as structural plasticity, developed specially for low-resolution synapses. We cover works related to both spike-based and more traditional non-spike-based algorithms. This is followed by developments in novel devices, such as floating-gate MOS, memristors, and spintronic devices. CMOS circuit innovations for on-chip learning and CMOS interface circuits for post-CMOS devices, such as memristors, are presented. Common architectures, such as crossbar or island style arrays, are discussed, along with their relative merits and demerits. Finally, we present some possible applications of neuromorphic hardware, such as brain-machine interfaces, robotics, etc., and identify future research trends in the field.

show abstract