A crystal-based digital ring oscillator

Abstract

A 0.16 m W, 2.3Volt multi-channel digitally controlled oscillaior (MICO) core is designed in a 0.6 micron CMOS process and its prototype design is mapped on an Altera FPGA that can be used for clock recovery applications. This architecture is suitable for digital wireless and cable hwnsceivers that use different bands for transmit and receive modes. As crysial-based-delay cells control its dominant propagation delay, we have obtained a reducedphase-noise in comparison to recently published analog-based DCOs.