A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAs

Hagemeyer, Jens; Keltelhoit, B.; Koester, Markus; Pomnann, M.

doi:10.1109/fpl.2007.4380668

Cited by 44 publications

(47 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…An inhomogeneous communication infrastructure can significantly reduce the number of feasible positions of the PR modules. In order to maintain the homogeneity of the communication infrastructures, the implementation of dedicated signals requires special design concepts introduced in [1] and [27]. Fig.…”

Section: B Embedded Macrosmentioning

confidence: 99%

“…In a tiled partially reconfigurable system as described in [1] the partially reconfigurable region is subdivided into reconfigurable tiles. Tiled partitioning allows for the placement of multiple PR modules with various sizes in a PR region.…”

Section: Tiled Partially Reconfigurable Systemsmentioning

confidence: 99%

“…• The communication infrastructure introduced in [1] is enhanced to support 2-D partial reconfiguration. The presented embedded communication macro is optimized for Virtex-4, Virtex-5 and Virtex-6 FPGAs.…”

Section: Introductionmentioning

confidence: 99%

“…In [1], a tool flow for generating suitable homogeneous communication infrastructures is introduced, which supports Xilinx Virtex-II FPGAs in a one-dimensional partially reconfigurable system. In this paper, we present refinements of this concept with the following focus.…”

Section: Introductionmentioning

confidence: 99%

“…In [5] bus macros, which support reserving a static link between the static part of the system and a PR region, are described. In [1] embedded communication macros are introduced. These allow advanced communication infrastructures, such as buses or networks to be built.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Design Optimizations for Tiled Partially Reconfigurable Systems

Koester

Luk

Hagemeyer

et al. 2011

IEEE Trans. VLSI Syst.

Self Cite

View full text Add to dashboard Cite

Abstract-In partially reconfigurable architectures, system components can be dynamically loaded and unloaded allowing resources to be shared over time. Dynamic system components are represented by partial reconfiguration (PR) modules. In comparison to a static system, the design of a partially reconfigurable system requires additional design steps, such as partitioning the device resources into static and dynamic regions. We present the concept of tiled PR regions, which enables a flexible online-placement of PR modules. Dynamic reconfiguration requires a suitable communication infrastructure to interconnect the static and dynamic system components. We present an embedded communication macro, a communication infrastructure that interconnects PR modules in a tiled PR region. Efficient online-placement of PR modules depends not only on the placement algorithm, but also on design-time aspects such as the chosen synthesis regions of the PR modules. We propose a design method for selecting suitable synthesis regions for the PR modules aiming to optimize their placement at run-time.

show abstract

Section: B Embedded Macrosmentioning

confidence: 99%

Section: Tiled Partially Reconfigurable Systemsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations