A Digital Baseband with Novel Clock Generator for UHF RFID Tag

Abstract

Clock accuracy is critical to the performance of UHF (Ultra High Frequency) RFID (Radio Frequency Identification) tag, especially for the encoder in baseband. To reduce the bit error rate of the responded data from tag, a novel clock strategy is proposed in this paper, which generates a high accuracy clock for the encoder by counting the preamble of the commands from reader. Moreover, for reducing the chip area and the power consumption, a novel CRC (Cyclic Redundancy Check) generator is designed, which reuses the resource and fulfills a no-gap-link between the responded data and CRC code. The baseband of tag is implemented in a 0.18µm CMOS process and its area is 75479µm 2 .Simulation results show that the frequency variation of the clock is within a reasonable range.