A Digital Emulator Design for the Swimming Rhythmic Pattern Generator of a Lamprey

Abstract

It is difficult to perform multiplication with digital devices and required to the more practical implementation methods. Thus, a well-known simpler transfer function adaptation to a swimming pattern generator is suggested for the digital implementation easiness in here. However, the direct adaptation of this function to this neural circuit is insufficient, so a control parameter is included in the laterally inhibitor neurons. Its fittest value is determined by a bifurcation diagram for getting a neural circuit that produces rhythmic patterns. Then, a four-segmented neural swimming pattern generator is constructed by using this simpler function and the anti-phase firings of neuron groups on the opposite sides is observed by the numerical simulations. Additionally, it is aimed to obtain an adjustable time delay between the neural segments, so the 'reciprocal inhibition' synaptic connections are adapted to this four-segmented structure. The effect of the reciprocal inhibition on time delays is observed by the standard deviation and numerical simulations. The final aim is to get the electrical signals with the digital device-based implementation for emulating the swimming pattern generator of a lamprey and a Field Programmable Gate Array-based realization is carried out by using the simpler transfer function. To see the achievement of this implementation, the anti-phase firings of neuron groups on the opposite sides and getting an adjustable time delay between neural segments are verified by the electrical signals. Moreover, the swimming pattern generator of a lamprey is realized with FPGA without using any multiplier blocks thanks to the simplification process.INDEX TERMS Swimming Pattern Generator, lamprey, reciprocal inhibition, time delay, Field Programmable Gate Array-FPGA