A fabrication method for high performance embedded DRAM of 0.18 μm generation and beyond

Abstract

A new fabrication method for embedded DRAM of 0.18um generation is proposed, which realizes full compatibility of LOGIC process such as CO salicide, dual work function gate, small thermal budget and metalization, and introduces Self-aligned Salicide Block(SSB), a new process technology. Fabricated embedded DRAM shows excellent characteristics respecting both retention time and MOSFET AC/DC performance, promising high performance of SOCmstem Qn a chip) applications.