2010 IEEE International Reliability Physics Symposium 2010
DOI: 10.1109/irps.2010.5488786
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A failure levels study of non-snapback ESD devices for automotive applications

Abstract: Snapback ESD devices suffer from increasing danger when the protected ICs experience ESD events in powered up states. To ensure more reliable ESD protections, non-snapback ESD structures are gaining more importance in the field of automotive ESD design. Two types of on-chip non-snapback ESD devices, pn-diodes and active FET structures are investigated in this work regarding their failure levels. Characteristics of the ESD devices as well as electrical SOA of an nLDMOS are evaluated and discussed in detail with… Show more

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Cited by 11 publications
(3 citation statements)
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“…While the failure currents, It2, are similar for both the PN source and Hybrid Source LDMOS, the drain voltage under which this happens is significantly different. For this reason it is useful to compare the power-to-failure metric [14], Vd * Id, as shown in Fig. 9.…”
Section: B 25ns Measurement and Resultsmentioning
confidence: 99%
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“…While the failure currents, It2, are similar for both the PN source and Hybrid Source LDMOS, the drain voltage under which this happens is significantly different. For this reason it is useful to compare the power-to-failure metric [14], Vd * Id, as shown in Fig. 9.…”
Section: B 25ns Measurement and Resultsmentioning
confidence: 99%
“…This enables a more direct path for holes to pass to the p+ body pick up, Fig. 14 Thus, a lower resistance is seen by the holes, and an enhancement to the electrical SOA can be expected. Previously, this resistance reduction had been in the range 21%....58% [4].…”
Section: B 25ns Measurement and Resultsmentioning
confidence: 99%
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