A Fast-Settling Frequency Synthesizer Using Statistical Frequency Measurement Method

The current work employs the HMC830 phase-locked loop chip to design a frequency synthesizer operating in the L-band. The frequency synthesizer can provide a local oscillation signal for the RF receiver front end. This article employs the phase-locked synthesis technique to describe the design scheme. Due to the advantages of the passive loop filters, such as simplicity, low cost, and low phase noise, a passive fourth-order RLC loop filter is proposed to improve the output signal quality and reduce phase noise. The performance of this loop filter is compared with the passive fourth-order RC loop filter. The effects of these two loop filters on phase noise, loop capture time, and spur suppression are analyzed. Subsequently, the design scheme, simulation analysis, and test results of the frequency synthesizer are presented under these two loop filters. The test results indicate that the passive fourth-order RLC loop filter outperforms the passive fourth-order RC loop filter; its output signal phase noise is higher than −100 dBc/Hz@1 kHz, loop capture time is less than 100 us, and spur suppression is better than 60 dBc. This frequency synthesizer can provide high-performance local oscillation signals for wireless communication equipment such as transmitters and receivers. It meets the application requirements of many radio communication circuit structures and has good application prospects.

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A Fast-Settling Frequency Synthesizer Using Statistical Frequency Measurement Method

Cited by 2 publications

References 17 publications

Design and Experimental Verification of a 6.25-GHz PLL for Harsh Temperature Conditions in 65-nm CMOS Technology

Design and Experimental Verification of a 6.25-GHz PLL for Harsh Temperature Conditions in 65-nm CMOS Technology

A Low Phase Noise Frequency Synthesizer with a Fourth-Order RLC Loop Filter

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