A flexible switch-router with reconfigurable forwarding and Linux-based Control Element

Abstract

The practical validation of investigating new router architectures and control algorithms is troublesome. It is partially due to the lack of programmable architectures that are fast enough for current networking, widely programmable, and equipped with the great variety of protocols that routers and switches has to handle. The idea of open, software-based routers running on commodity hardware have spread in recent years, resulting several practical implementations of so called softrouters. Beside the economic advantages of having the Forwarding Element functions tackled by commodity Network Interface Cards (NICs), this approach suffers from issues of suboptimal performance. This is partly due to the fact that all forwarding decisions are made by the main CPU instead of involving local processors at the NICs. Separating the functions into Forwarding Element and Control Element by the ForCES framework enabled the development of new control algorithms and protocol implementations for routers, however there are no widely available implementations. This paper describes a solution that is utilizing programmable hardware accelerators at the Forwarding Element, while keeping the advantages of open, Linux-based software-based router implementations. The hardware accelerators are implemented in the C-board, a reconfigurable, FPGA-based networking platform. The interoperability with existing Control Elements are described together with an analysis of features and capabilities of this combined solution.

C-GEP: Adaptive network management with reconfigurable hardware

“…C-GEP is a multi-purpose, programmable, FPGA-based Gigabit Ethernet Platform -the successor of C-Board [14]. Its main purpose is to provide means for handling 1, 10, 40 and 100 Gbit/s Ethernet traffic in a flexible manner.…”

100 Gbit/s network monitoring with on-the-fly reconfigurable rules for multi-encapsulated packets

“…C-GEP is the successor of the C-Board platform [2] [3], that had similar capabilities -but it reached these with four FPGAs and up to 2x10Gbit/s. The general description of the 100Gbit/s capable version of C-GEP appears in [4].…”