A Fully Integrated Cryo-CMOS SoC for State Manipulation, Readout, and High-Speed Gate Pulsing of Spin Qubits

Park, Jong Seok; Subramanian, S.; Lampert, Lester; Mladenov, Todor; Klotchkov, Ilya; Kurian, Dileep; Juarez-Hernandez, Esdras; Esparza, Brando Perez; Kale, Sirisha; Beevi, K T Asma; Premaratne, Shavindra; Watson, Thomas; Suzuki, Satoshi; Rahman, Md. Shafiqur; Timbadiya, Jaykant; Soni, Saksham; Pellerano, Stefano

doi:10.1109/jssc.2021.3115988

Cited by 34 publications

(30 citation statements)

References 39 publications

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“…The cryo-CMOS experiences all the increases in threshold voltage, mobility, and subthreshold slope [15], [33]. With these characteristics, the functionality of CMOS circuits at 4 K has been verified in the prior works [15], [16], [17], [18], [19], [22], [23], [24], [27]. The increased mobility results in about a 30% increase in the on-current of switches, enabling a high-speed digital operation at a faster clock [15], [33].…”

Section: ) Considerations For Cryogenic Circuit Designmentioning

confidence: 82%

A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit

Kang

Minn

Bae

et al. 2022

IEEE J. Solid-State Circuits

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This article presents a cryo-CMOS quantum controller IC for superconducting qubits. The proposed globally synchronized clock system internally generates different local oscillator (LO) frequencies using multiple phase-locked loops (PLLs) driven by a common reference clock. It provides flexibility in spectral management as well as scalability for expansion to a large-scale quantum controller. The test chip includes two PLLs, four pulse modulator channels, and two receiver channels. Implemented chip in 40-nm CMOS shows full functionalities at 3.5 K. The designed pulse modulator circuits are verified with the specifications for expected fidelity of 99.99%.

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Section: ) Considerations For Cryogenic Circuit Designmentioning

confidence: 82%

A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit

Kang

Minn

Bae

et al. 2022

IEEE J. Solid-State Circuits

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“…4K CMOS. As a promising way to improve the system's scalability, researchers are actively trying to utilize cryogenic CMOS devices operating at 4K [3,53,70]. Therefore, our model supports 4K CMOS technology by following this recent trend.…”

Section: Temperature and Device Technology Candidates Xq-estimatormentioning

confidence: 98%

“…Nowadays, architects are trying to operate this CMOS-based QC interface at the 4K stage (i.e., CryoCMOS QC interface) with the same motivation as Section 6.1.1. As a result, several prototype chips recently have been demonstrated by leading industries [3,53,70].…”

Section: Power Consumption Of Qc Interfacementioning

confidence: 99%

“…However, the CryoCMOS QC interface's scalability is still limited due to the huge power dissipation at 4K. For example, a recent fully-integrated CryoCMOS prototype chip [53] consumes around 25mW/qubit in its analog circuits, and thus it cannot be scaled to even more than 40 qubits with the 1W budget assumed. To address this issue, researchers are continuously lowering the CryoCMOS QC interface's power consumption [34] while also exploring an SFQ-based pure digital QC interface [26,32].…”

Section: Power Consumption Of Qc Interfacementioning

confidence: 99%

See 1 more Smart Citation

XQsim

Byun

Kim

Min

et al. 2022

Proceedings of the 49th Annual International Symposium on Computer Architecture

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we provide the future directions to design a 10+K qubit quantum control processor with several design guidelines and architecture optimizations. Our case study shows that the final control processor architecture can successfully support ~59K qubits with our operating temperature and technology choices. CCS CONCEPTS• Computer systems organization → Quantum computing; • Hardware → Emerging tools and methodologies.

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“…On the other hand, high frequency operation of RF up conversion architectures [7]- [9] would demand high frequency LO and mixer, adding up to their total power consumption. The digital blocks consume only 20% of the total power, where as the power consumption of [8]- [9] is largely dominated by the digital part as shown in Table II. The total power consumption is often reported as power per qubit for a given number of frequency multiplexed qubits per controller.…”

Section: Cryogenic Measurementsmentioning

confidence: 99%

A cryogenic SRAM based arbitrary waveform generator in 14 nm for spin qubit control

Prathapan

Mueller

Menolfi

et al. 2022

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)

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Realization of qubit gate sequences require coherent microwave control pulses with programmable amplitude, duration, spacing and phase. We propose an SRAM based arbitrary waveform generator for cryogenic control of spin qubits. We demonstrate in this work, the cryogenic operation of a fully programmable radio frequency arbitrary waveform generator in 14 nm FinFET technology. The waveform sequence from a control processor can be stored in an SRAM memory array, which can be programmed in real time. The waveform pattern is converted to microwave pulses by a source-series-terminated digital to analog converter. The chip is operational at 4 K, capable of generating an arbitrary envelope shape at the desired carrier frequency. Total power consumption of the AWG is 40-140 mW at 4 K, depending upon the baud rate. A wide signal band of 1-17 GHz is measured at 4 K, while multiple qubit control can be achieved using frequency division multiplexing at an average spurious free dynamic range of 40 dB. This work paves the way to optimal qubit control and closed loop feedback control, which is necessary to achieve low latency error mitigation and correction in future quantum computing systems.

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A Fully Integrated Cryo-CMOS SoC for State Manipulation, Readout, and High-Speed Gate Pulsing of Spin Qubits

Cited by 34 publications

References 39 publications

A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit

A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit

XQsim

A cryogenic SRAM based arbitrary waveform generator in 14 nm for spin qubit control

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