2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) 2019
DOI: 10.1109/icecs46596.2019.8964972
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A Hierarchical Track and Hold Circuit for High Speed ADC-Based Receivers in 22nm FDSOI

David Cordova1,
Wim Cops2,
Yann Deval3
et al.
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Cited by 3 publications
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Low-Power High-Speed ADCs for ADC-Based Wireline Receivers in 22 nm FDSOI

Cordova1,
Cops2,
Deval
3
et al. 2021
VLSI-SoC: Design Trends
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Low-Power High-Speed ADCs for ADC-Based Wireline Receivers in 22 nm FDSOI

Cordova1,
Cops2,
Deval
3
et al. 2021
VLSI-SoC: Design Trends
0
0
0
0
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Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX

Cordova1,
Cops2,
Deval
3
et al. 2021
2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS)
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A 0.8V 875 MS/s 7b low-power SAR ADC for ADC-Based Wireline Receivers in 22nm FDSOI

Cordova1,
Cops2,
Deval
3
et al. 2020
2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC)
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