A High Gain, High IIP3, Perfect Input Matching, Programmable Gain LNA in CMOS Technology

Tajik, Amirhossein; TaheriNasab, SeyedAli Samareh; Sheikhaei, Samad

doi:10.1109/icee52715.2021.9544181

Cited by 2 publications

(1 citation statement)

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“…Usually, the broadband behavior in the receiver is defined based on the performance of its first active block, i.e. the low-noise amplifier (LNA) [1][2]. For wideband applications it is possible to use a single LNA with large bandwidth instead of multiple narrowband LNAs.…”

Section: Introductionmentioning

confidence: 99%

A 0.7-2.7 GHz Low Power LNA with Noise Cancellation and Current-Reused Technique

Baghini

TaheriNasab

Sheikhaei

2022

Preprint

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In this work, a low-power wideband low noise amplifier (LNA) is presented. The proposed LNA is designed based on CG-CS topology which is used for broadband applications. In addition, by adjusting the gm values of the CS stage transistors properly, an attempt has been made to cancel the noise of the CG stage. Moreover, by using the current-reused technique and placing an inductor in the middle node of cascode transistors in the CS stage, it is possible to reduce the impedance caused by the parasitic capacitors of the transistors, which enhance the power gain (S21). In addition, a gm-boosting technique is adopted to achieve better input impedance matching and reducing the current which pass through the CG stage. And finally, for better linearity results, sweet spot technique has been used to determine the bias voltage of transistors. The LNA has the maximum power gain (S21) of 18.6dB with a bandwidth of 0.7-2.7GHz, and noise figure of 2.95-3.4dB. It consumes 3.97mW of power from a 1.8V supply excluding testing buffer.

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Section: Introductionmentioning

confidence: 99%