A High Gain Low Power Operational Amplifier using Class AB Output Stage

Kumar, Amod; Krishna, K. Lokesh; Viswateja, K. Abhinav; Gopi, K.; Rao, S. Mohan; Mamatha, B.

doi:10.1109/iccmc.2019.8819814

Cited by 4 publications

(2 citation statements)

References 7 publications

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“…It is also quite affordable, most generalpurpose amplifiers selling for under a dollar apiece. Modern designs have been engineered with durability in mind as well: several "op-amps" are manufactured that can sustain direct short-circuits on their outputs without damage [6]- [9]. The Op Amp (Operational Amplifier) is a high gain, dc coupled amplifier designed to be used with negative feedback to precisely define a closed loop transfer function.…”

Section: Imentioning

confidence: 99%

Analysis of Two Stage CMOS Operational Amplifier in 90nm CMOS Technology

Kavya,

Nagasowmya,

Ankitha

et al. 2024

IJRASET

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Operational amplifier circuits are used in computation, instrumentation and other applications. Precision op-amps previously used in instrumentation are now-a-days being used in industrial and automotive applications. Hence, there always exists a need for better precision op-amps. It should operate under a wide temperature range. Nowadays, due to the industry trend of applying standard process technologies to implement both analog circuits and digital circuits on the same chip, Complementary Metal-Oxide Semiconductor (CMOS) technology has become dominant over bipolar technology for analog circuit design in a mixed-signal system. Two-stage Op-Amp is one of the most commonly used Op-Amp architectures. In this work an operational amplifier based on CMOS is presented whose input depends on its bias currents which is 20µA and designed using 180nm and 90nm technologies. In sub-threshold region due to unique behavior of the MOS transistors not only allows a designer to work at low voltages and it also allows operating at low input bias currents. Most CMOS Op-Amps are designed for specific on-chip applications and are only required to drive capacitive loads of a few pf. In this proposed work, design of a two stage fully differential CMOS operational amplifier is presented and simulations are carried out in 180nm and 90nm technologies for various parameters. The simulation is to be carried out using Cadence Virtuoso Tool.

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Section: Imentioning

confidence: 99%

Analysis of Two Stage CMOS Operational Amplifier in 90nm CMOS Technology

Kavya,

Nagasowmya,

Ankitha

et al. 2024

IJRASET

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“…Sub-threshold based designs addresses ultrasonic, biomedical, and wireless sensor interface applications [5,[10][11][12][13][14][15]. The obstacle with design of low power analog circuits is relatively high threshold voltages, which is the result of scaling difference between the power supply and the threshold voltage (Vt).…”

Section: Introductionmentioning

confidence: 99%

Low Power-High Gain Bulk-Driven 3 Stages CMOS Miller OTA in 130nm Technology

Afacan

2020

Sakarya University Journal of Science

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The requirement of low-power analog circuits has been raised in recent years due to the strict limitation of power consumption in modern applications. Therefore, the trend in analog circuit design has been changed such that they are able to meet the required specifications with lower power dissipation. Design of low power operational transconductance amplifiers, which are the main building blocks in many analog applications, has been more pronounced to keep the power dissipation below certain levels. In this concern, this study presents a low power, highperforming bulk-driven 3 stages CMOS OTA in a 130 nm standard CMOS technology. The proposed circuit leverages the bulk-driven architecture at the input stage; thus it can operate under sub 1-V. The design process of the proposed OTA is explained in detail and the results are validated via post-layout simulations. The proposed OTA is powered by ±0.45 V symmetric voltage sources, where the power consumption is around 27 μW. The area overhead is only 0.0017 μm2. The open-loop gain, unity gain frequency, and the phase margin are 73.24 dB, 5.167 MHz, and 78 o , respectively. To demonstrate the performance of the proposed circuit, a comparison is made with other circuits published in the last five years considering the well-known figures of merit (FOMs). Comparison results indicate that the proposed solution outperforms the other circuits for small-signal operation while it is the runner-up for large-signal operation.

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