A High-Performance PWM Algorithm for Common-Mode Voltage Reduction in Three-Phase Voltage Source Inverters

Wheeler

IEEE Trans. Power Electron.

et al. 2016

A note on versions:The version presented here may differ from the published version or from the version of record. If you wish to cite this item you are advised to consult the publisher's version. Please see the repository url above for details on accessing the published version and note that access may require a subscription. Abstract-This paper presents a new space vector modulation (SVM) strategy for matrix converters to reduce the commonmode voltage (CMV). The reduction is achieved by using the switch configurations that connect each input phase to a different output phase, or the configurations that connect all the output phases to the input phase with minimum absolute voltage. These two types of configurations always produce lower peak CMV than the others, especially the former ones that result in zero CMV at the output side of matrix converters. In comparison with the existing SVM methods, this strategy has a very similar software overhead and calculation time. Simulation and experiment results are shown to validate the effectiveness of the proposed modulation method in reducing not only the peak value but also the root mean square value of the CMV.

Section: ) Comparison With Other Cmv-reduced Svm Algorithmsmentioning

confidence: 99%

Common-Mode Voltage Reduction for Matrix Converters Using All Valid Switch States

Wheeler

IEEE Trans. Power Electron.

et al. 2016

Journal of Power Electronics

“…Thus, voltage deviation is unavoidable with a finite pulse width resolution. The voltage error, although small within each carrier period, will accumulate and induce considerable current harmonics [24]. Therefore, the objective of the switching signal generation is to decide the duty ratios…”

Section: A Objectives Of Modulationmentioning

confidence: 99%

Voltage Source Inverter Drive Using Error-compensated Pulse Width Modulation

Chen

Lin³

2016

An error-compensated pulse width modulator (ECPWM) is proposed to improve the baseband harmonic performance and the switching loss of voltage source inverters (VSIs). Selecting between harmonic distortion and switching loss is a design tradeoff in the conventional space vector pulse width modulation. In this work, an accumulated difference in produced and desired phase voltages is considered to adjust the reference signal. This mechanism can compensate for the voltage error in the previous carrier period. With error compensation every half-carrier period, the proposed ECPWM allows one-half reduction in carrier frequency without scarifying baseband harmonic distortion. The proposed modulator is applied to a three-phase VSI with R-L load and a motor-speed-control system for experiments. The measured efficiency and operating temperature of switches confirm the effectiveness of the proposed scheme.

IEEE Trans. Ind. Electron.

“…However, the number of commutations in a switching cycle is increased compared to that of the SVM and may not be feasible in high power applications due to the high switching losses. A Near State PWM (NSPWM) employs three nearest active voltage vectors to synthesize the − → V ref [16], [17]. Out of these PWM schemes, the AZSPWM and the NSPWM are adopted to modulate the parallel interleaved VSCs because of their superior harmonic performance, as discussed in Section IV.…”

Section: B Reduced CM Voltage Pwm Schemesmentioning

confidence: 99%

An Integrated Inductor for Parallel Interleaved VSCs and PWM Schemes for Flux Minimization

Gohil

Bede

Teodorescu

et al. 2015

Abstract-The interleaving of the carrier signals of the parallel Voltage Source Converters (VSCs) can reduce the harmonic content in the resultant switched output voltages. As a result, the size of the line filter inductor can be reduced. However, in addition to the line filter, an inductive filter is often required to suppress the circulating current. The size of the system can be reduced by integrating these two inductors in a single magnetic component. A integrated inductor, which combines the functionality of both the line filter inductor and the circulating current filter inductor is presented. The PulseWidth Modulation (PWM) schemes to reduce the flux in some parts of the integrated inductor are also analyzed. The flux reduction achieved by using these schemes is demonstrated by comparing these schemes with the conventional space vector modulation and the 60• clamped discontinuous PWM scheme. The impact of these PWM schemes on the harmonic performance is also discussed. Simulation and experimental results are presented to validate the analysis.