A Ku-band transmitter front-end in 65-nm CMOS with >45-dBc image-rejection ratio and >43-dBc LOFT suppression

Abstract

This paper presents a fully integrated Ku-band transmitter frontend with high image rejection ratio (IRR), local oscillator feedthrough (LOFT) suppression, gain and output power for point-to-point (P2P) communication. To avoid the bulky off-chip image-rejection filter, the Hartley transmitter structure is employed, in which frequency plan is undertaken to improve the IRR and LOFT performance, and a two-stage polyphase filter (PPF) and an in/quadrature-phase (I/Q) Gilbert mixer are utilized to improve the IRR further. With the capacitive neutralization and transformer-based series power combining techniques, a two-stage power amplifier (PA) is used to obtain high gain and output power. In the LO buffer, a flexible phase inverting cascode structure is used to achieve reliable upsideband operation, and the inductive peaking technique and cross-coupled transistor pair are employed to promote the LO swing. Fabricated in a 65nm CMOS process, the proposed Ku-band transmitter occupies a chip area of 0.98 mm 2 , and consumes 304-mW power consumption from a 1.2-V supply voltage. With measurements, over 15.8-17.9-GHz radio frequency (RF) bandwidth, the transmitter achieves an IRR and LOFT suppression ratio of 45-55 and 43-52 dBc, respectively. Moreover, it exhibits a conversion gain of 28.5 dB, an output 1-dB compression point (OP1dB) of 13.3 dBm and a saturated output power (Psat) of 16 dBm.