A low power reconfigurable multi-mode continuous time Delta Sigma modulator for seven different mobile standards with VCO-based quantizer

Charmin, Asghar; Aghdam, Esmaeil Najafi

doi:10.1007/s10470-016-0907-x

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Cited by 2 publications

References 16 publications

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Design and Implementation in VHDL-AMS of a Novel Reconfigurable Mono-bit Sigma Delta Modulator

Farhat,

Dahman,

Lloret

et al. 2023

2023 IEEE International Workshop on Mechatronic Systems Supervision (IW_MSS)

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Design and Implementation in VHDL-AMS of a Novel Reconfigurable Mono-bit Sigma Delta Modulator

Farhat,

Dahman,

Lloret

et al. 2023

2023 IEEE International Workshop on Mechatronic Systems Supervision (IW_MSS)

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An Ultra-Low-Power, 16 Bits CT Delta-Sigma Modulator Using 4-Bit Asynchronous SAR Quantizer for Medical Applications

Javahernia

Aghdam

Torkzadeh

2019

J CIRCUIT SYST COMP

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In this paper, a low-power second-order feed-forward capacitor-structure continuous-time [Formula: see text] modulator with a 4-bit asynchronous successive approximation register (SAR) quantizer is presented. Through the utilization capacitor structure in the proposed modulator, first, the summation node of the integrators’ outputs and the feed-forward signals is implemented within the second integrator to reduce power consumption by eliminating an active summing amplifier. Second, the proposed architecture can compensate for the quantizer delay without using any excess inner digital to analog converter (DAC). In this design, the modulator applies two different low-power operational amplifiers. These advantages cause the modulator to consume very low power and achieve a favorable figure of merit (FOM) value. In fact, in this paper, the combination of the previously reported methods and designs and doing required reforms has led to a new design with better performance, especially in power reduction. The designed modulator which is simulated using 0.18[Formula: see text][Formula: see text]m CMOS technology achieves 95.98[Formula: see text]dB peak signal-to-noise and distortion (SNDR) for 10[Formula: see text]KHz signal bandwidth and dissipates 44[Formula: see text][Formula: see text]w while its FOM is obtained about 43 fJ/conv.-step.

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A low power reconfigurable multi-mode continuous time Delta Sigma modulator for seven different mobile standards with VCO-based quantizer

Cited by 2 publications

References 16 publications

Design and Implementation in VHDL-AMS of a Novel Reconfigurable Mono-bit Sigma Delta Modulator

Design and Implementation in VHDL-AMS of a Novel Reconfigurable Mono-bit Sigma Delta Modulator

An Ultra-Low-Power, 16 Bits CT Delta-Sigma Modulator Using 4-Bit Asynchronous SAR Quantizer for Medical Applications

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