A low temperature coefficient wide temperature range bandgap reference with high power supply rejection

Qu, Jialing; Wu, Chenjian

doi:10.1587/elex.20.20230104

Cited by 3 publications

(4 citation statements)

References 26 publications

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“…Hence, we did not include pads/bumps or package-related parasitic elements. [31][32][33][34]. Lastly, the design by J. Lee [29,30] underperformed compared to the proposed design in terms of the supply voltage (0.375 V more needed), temperature coefficient (3.9 times more), and power (1.7 times more), as shown in Table 1.…”

Section: Simulation Resultsmentioning

confidence: 98%

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A 10.5 ppm/°C Modified Sub-1 V Bandgap in 28 nm CMOS Technology with Only Two Operating Points

Nagulapalli,

Yassine,

Tammam

et al. 2024

Electronics

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Reference voltage/current generation is essential to the Analog circuit design. There have been several ways to generate quality reference voltage using bandgap reference (BGR) and there are mainly two types: current mode and voltage mode. The current-mode bandgap reference (CBGR) is widely accepted in industry due to having an output voltage which is below 1 V. However, its drawbacks include a lack of proportional to absolute temperature (PTAT) current availability, a large silicon area, multiple operating points, and a large temperature coefficient (TC). In this paper, various operating points are explained in detail with diagrams. Similar to the conventional voltage mode bandgap reference (VBGR) circuits, modifications of the existing circuits with only two operating points have also been proposed. Moreover, the proposed BGR occupies a much smaller area due to eliminating the complimentary to absolute temperature (CTAT) current-generating resistor. A new self-biased opamp was introduced to operate from a 1.05 V supply, reducing systematic offset and TC of the BGR. The proposed solution has been implemented in 28 nm CMOS TSMC technology, and extraction simulations were performed to prove the robustness of the proposed circuit. The targeted mean BGR output is 500 mV, and across the industrial temperature range (−40 to 125 °C), the simulated TC is approximately 10.5 ppm/°C. The integrated output noise within the observable frequency band is 19.6 µV (rms). A 200-point Monte Carlo simulation displays a histogram with a 2.6 mV accuracy of 1.2% (±3-sigma). The proposed BGR circuit consumes 32.8 µW of power from a 1.05 V supply in a fast process and hot (125 °C) corner. It occupies a silicon area of 81 × 42 µm (including capacitors). This design can aim for use in biomedical and sensor applications.

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Section: Simulation Resultsmentioning

confidence: 98%

“…This layout was designed for the sake of extracted simulations, not for manufacturing. Hence, we did not include pads/bumps or package-related parasitic elements [31][32][33][34].…”

Section: Simulation Resultsmentioning

confidence: 99%

A 10.5 ppm/°C Modified Sub-1 V Bandgap in 28 nm CMOS Technology with Only Two Operating Points

Nagulapalli,

Yassine,

Tammam

et al. 2024

Electronics

View full text Add to dashboard Cite

show abstract

“…The reason is that when the circuit is directly powered by V DD , the fluctuation of V DD will have a direct impact on the V REF , which will greatly diminish the PSR. Therefore the employment of the pre-regulated structure can effectively enhance the PSR performance [19,23,24]. Fig.…”

Section: Pre-regulated Structurementioning

confidence: 99%

“…However, the pursuit of lower TC comes with trade-offs. Circuits designed for low TC may exhibit lower power supply rejection (PSR) and struggle to suppress power supply ripple [19]. In response to the challenge of lower PSR, often in the output of the circuit will be introduced into the RC low-pass filter circuit [20,21], but smaller resistors and capacitors are hard to play an effective role in filtering out the noise and boosting the PSR in higher frequency range, and the integration of larger resistors and capacitors will bring a very large chip area occupation [22].…”

Section: Introductionmentioning

confidence: 99%

A 0.98ppm/°C, high PSR, low noise curvature-compensated CMOS bandgap reference with resistor-less low-pass filter

Ye,

Fang,

et al. 2024

IEICE Electron. Express

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In this paper, we proposed a 0.98-ppm/°C, high power supply rejection (PSR), low-noise and curvature-compensated bandgap reference with a resistor-less low-pass filter in 0.18-𝜇m CMOS process. One prominent feature of the circuit is a low-temperature coefficient (TC) measuring less than 1-ppm/°C, achieved through the implementation of high-order curvature compensation. Another notable enhancement is the incorporation of a resistor-less low-pass filter, which effectively improves the PSR and noise performance at medium and high frequencies. Experimental results indicate that the circuit is able to realize an average output reference voltage of 1.21V @4V and an average low TC of 0.98-ppm/°C @ -35°C-135°C at different corners. In addition, AC simulation results show that the circuit has a high PSR over the full frequency range and is capable of achieving PSR of -143.

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Curvature-Compensated Bandgap Voltage Reference with Low Temperature Coefficient

Li,

Qiao

et al. 2024

Electronics

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Resistance errors in bandgap reference (BGR) circuits often cause deviations in design indicators, and it is true that utilizing various compensation techniques mitigates the impact of resistance errors. In this paper, an original BGR circuit with 180 nm BCD processing is presented, which uses an improved high-order compensation and curvature compensation. The proposed BGR contains four main blocks, including a start-up stage, a first-order temperature compensation stage, a high-order temperature compensation stage, and a curvature compensation stage. Meanwhile, a trimming resistor array structure is designed to revise the temperature coefficient (TC) deviation of the test output voltage from the theoretical design value. Through wafer-level laser trimming technology, the measurement results are achieved with very little difference from the theoretical design value. The proposed BGR provides a stable reference voltage at 1.25 V with a low TC and strong power supply rejection (PSR). Within temperatures ranging from −45 °C to 125 °C, the measured TC shows an optimal value at 4.2 ppm/°C and the measured PSR shows −100 dB.

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A low temperature coefficient wide temperature range bandgap reference with high power supply rejection

Cited by 3 publications

References 26 publications

A 10.5 ppm/°C Modified Sub-1 V Bandgap in 28 nm CMOS Technology with Only Two Operating Points

A 10.5 ppm/°C Modified Sub-1 V Bandgap in 28 nm CMOS Technology with Only Two Operating Points

A 0.98ppm/°C, high PSR, low noise curvature-compensated CMOS bandgap reference with resistor-less low-pass filter

Curvature-Compensated Bandgap Voltage Reference with Low Temperature Coefficient

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