A Neuromorphic Architecture for Context Aware Text Image Recognition

Qiu, Qinru; Li, Zhe; Ahmed, Khadeer; Liu, Wei; Habib, Syed Faisal; Li, Hai; Hu, Miao

doi:10.1007/s11265-015-1067-4

Cited by 11 publications

(2 citation statements)

References 25 publications

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“…In other cases, because of their plasticity-like properties, memristors have been used to implement synaptic systems that include Hebbian learning in general [1224]- [1231] or STDP in particular [254], [1364], [1365], [1369]- [1371], [1373]- [1377], [1381]- [1389], [1391]- [1393], [1397]- [1400], [1403]- [1405], [1409], [1412], [1413], [1416], [1420]- [1422], [1424], [1430]- [1432], [1436]- [1438], [1441]- [1443], [1445], [1450], [1451]. Perhaps the most common use of a memristor in neuromorphic systems is to build a memristor crossbar to represent the synapses in the network [475], [476], [478], [1288], [1294], [1296], [1301], [1302], [1307]- [1312], [1316], [1317], ...…”

Section: B Device-level Componentsmentioning

confidence: 99%

A Survey of Neuromorphic Computing and Neural Networks in Hardware

Schuman¹,

Potok²,

Patton³

et al. 2017

Preprint

176

180

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Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture. This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems. The promise of the technology is to create a brainlike ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities. In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history. We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications. We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled. The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed.

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Section: B Device-level Componentsmentioning

confidence: 99%

A Survey of Neuromorphic Computing and Neural Networks in Hardware

Schuman¹,

Potok²,

Patton³

et al. 2017

Preprint

176

180

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show abstract

“…At the architecture level, starting with monolithic 3D architecture, many new architectures such as neuromorphic architecture, reconfigurable logic architecture, logic-memory hybrid architecture, multivalued logic architecture are being investigated111213141516. However, none of the above devices or architecture options have been accepted as a dominant technical option for post-silicon and post von Neumann technology.…”

mentioning

confidence: 99%

Demonstration of Complementary Ternary Graphene Field-Effect Transistors

Kim

Noh

et al. 2016

Sci Rep

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Strong demand for power reduction in state-of-the-art semiconductor devices calls for novel devices and architectures. Since ternary logic architecture can perform the same function as binary logic architecture with a much lower device density and higher information density, a switch device suitable for the ternary logic has been pursued for several decades. However, a single device that satisfies all the requirements for ternary logic architecture has not been demonstrated. We demonstrated a ternary graphene field-effect transistor (TGFET), showing three discrete current states in one device. The ternary function was achieved by introducing a metal strip to the middle of graphene channel, which created an N-P-N or P-N-P doping pattern depending on the work function of the metal. In addition, a standard ternary inverter working at room temperature has been achieved by modulating the work function of the metal in a graphene channel. The feasibility of a ternary inverter indicates that a general ternary logic architecture can be realized using complementary TGFETs. This breakthrough will provide a key stepping-stone for an extreme-low-power computing technology.

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