A New Hardware Architecture for SVPWM Technique Based on the Taylor Decomposition

Abstract

A novel hardware digital architecture for the Space Vector Pulse Width Modulation technique is proposed and based on a novel algorithm for the evaluation of the dwell-times. Indeed, the complexity of the calculation of trigonometric functions is solved introducing a Taylor series decomposition and using a convenient definition of the space vector α − β plane. Our architecture can modify the dwell-times as function of the carrier and switching frequencies, of the phase and of the modulation index. Comparing to other techniques, it avoids the use of external reference voltages as well as of the pre-calculated dwelltimes, like for the LUT-based architectures. Although it can be implemented in several logic devices, an Altera Cyclone V Field Programmable Gate Array is used as a digital controller of a three-phase power inverters and its resources are the 16% and 2%, respectively, of the Look-Up Tables and of the Flip Flops. Several cases are studied in order to show the goodness of the output waveforms during the real-time variations of the inputs.