A new oscillator with ultra low phase noise and high output swing

Bagheri, Morteza; Amirabadi, Amir; Zokaei, Abolfazl; Kamarei, Mahmoud; Pour, Daniel Soleimani

doi:10.1109/nemo.2014.6995685

Cited by 5 publications

(2 citation statements)

References 12 publications

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“…Oscillators based on active inductors find applications in SerDes, frequency doublers, bandpass filters, and so on. 35 Less area is consumed in oscillators with an active inductor and wide tuning range in multi-standard Internet of Things (IoT) applications.…”

Section: Tank Quality Factormentioning

confidence: 99%

Phase noise suppression in LC oscillators: Tutorial

Bagheri

2021

Circuit Theory & Apps

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This paper presents a comprehensive study of phase noise (PN) suppression in LC-tank oscillators. The goal of this study is to provide designers with the latest techniques for reducing PN in cross-coupled oscillators. To this end, we begin with a discussion of two prevalent PN models in oscillators: Hajimiri and Demir. We prefer the Hajimiri model because it does not involve very complicated math, and it offers engineers better insight into designing low-PN oscillators in the two-PN close-in regions in an oscillator spectrum (1/f 2 and 1/f 3 ). In 1/f 2 region, we show that a need for a large output-voltage swing leads to Class D and B oscillators, and a large output-current swing results in Class C oscillators. Also, reduction of the impulse sensitivity functions (ISFs) of an oscillator core can happen in Class F oscillators. A few solutions are presented for mitigating flicker noise up-conversion, such as adding resistances, controlling the oscillation amplitude, decreasing the conduction angle, guiding the high-frequency harmonics of current, and shifting the phase of V GS against V DS . We also provide a comparison of recent state-of-the-art literature to show what constitutes a good PN in both 1/f 2 and 1/f 3 regions in cross-coupled oscillators. We conclude that a cross-coupled oscillator can reach the best performances in 1/f 3 and 1/f 2 PN regions if the oscillator is designed in Class C with the K block and uses the techniques of narrowing the conduction angle, the tail inductor, and the modified tank simultaneously.

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Section: Tank Quality Factormentioning

confidence: 99%

Phase noise suppression in LC oscillators: Tutorial

Bagheri

2021

Circuit Theory & Apps

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“…Designing a low‐phase noise and a low‐power VCO is an extremely broad topic for research 23–31 and a comprehensive analysis of this topic is beyond the scope of this paper. Readers who want more information on implementing a low‐phase noise VCO should refer to Bagheri and Li 23 .…”

Section: Design and Simulation Of Vcomentioning

confidence: 99%

An ultra‐low power and low jitter frequency synthesizer for 5G wireless communication and IoE applications

Bagheri

2021

Circuit Theory & Apps

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This paper presents a fully integrated analog phase‐locked loop (PLL) fractional‐N frequency synthesizer for 5G wireless communication and Internet‐of‐Everything (IoE) applications. To demonstrate the effectiveness of this frequency synthesizer, we apply it to three wireless communication standards. Contrary to using Verilog or VHDL to implement the programmable frequency divider, we propose a new approach in the transistor level with a new divide‐by‐2/3 circuit, dynamic asynchronous resettable D and JK flip‐flops, and the OR & AND gates to customize the divider for low‐power, low‐jitter, and fast‐lock time applications. In addition, we have designed a new frequency phase detector (PFD) to overcome the dead region issue. An ultra‐low phase noise and low‐power voltage control oscillator (VCO) is exploited from our previous work with the flicker noise corner frequency around 10 kHz to achieve the lowest possible phase noise. The implementation is done in 180‐nm standard CMOS technology. It covers two frequency ranges including 2.4 to 2.48 GHz and 5 to 5.825 GHz for these wireless communication standards. According to simulations in the worst case, the lock time, rms‐jitter, in‐band fractional spur, power consumption, and jitter‐power figure‐of‐merit of the frequency synthesizer is 18 μs, 56 fs, −63 dBc, 4 mW, and −259, respectively.

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A modified cross-coupled oscillator

Bagheri

2020

Microsyst Technol

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A new oscillator with ultra low phase noise and high output swing

Cited by 5 publications

References 12 publications

Phase noise suppression in LC oscillators: Tutorial

Phase noise suppression in LC oscillators: Tutorial

An ultra‐low power and low jitter frequency synthesizer for 5G wireless communication and IoE applications

A modified cross-coupled oscillator

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