A New Reconfigurable True Random Number Generator and Physical Unclonable Function Unified Chip With On-Chip Auto-Calibration

Cao, Yuan; Liu, Wanyi; Zheng, Yue; Chen, Shuai; Ye, Jing; Qian, Lei; Chang, Chip-Hong

doi:10.1109/tcsi.2023.3316890

Cited by 3 publications

References 39 publications

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A 0.012‐mm² 0.244‐pJ/bit successive approximation register analog‐to‐digital converter‐based true random number generator for Internet of Things applications in a 65‐nm complementary metal–oxide–semiconductor

Cheng,

Chen,

Stefano

et al. 2024

Circuit Theory & Apps

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SummaryThis paper proposes a true random number generator (TRNG) based on a successive approximation register (SAR) analog‐to‐digital converter (ADC). A top‐plate sampling SAR ADC structure and a new MSB‐isolation switch scheme (MISS) are combined to achieve low‐power operation and small area occupancy at the same time. When the SAR ADC has completed its conversion, a secondary firing of the comparator measures the remaining signal. This 1‐bit quantized residue serves as the true random sequence, thus eliminating the need for extra circuitry in the TRNG. A 65‐nm prototype of the proposed TRNG was found to occupy an area of 0.012 mm2 and successfully passed all the National Institute of Standards and Technology (NIST) tests without post‐processing. It achieved a figure‐of‐merit of 0.244 pJ/bit for a 1 Mb/s random sequence with a 0.8‐V power supply. Its resilience to power noise injection attacks was also verified.

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A 0.012‐mm² 0.244‐pJ/bit successive approximation register analog‐to‐digital converter‐based true random number generator for Internet of Things applications in a 65‐nm complementary metal–oxide–semiconductor

Cheng,

Chen,

Stefano

et al. 2024

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

Jitter-Based True Random Number Generator with Dynamic Selection Bit Reconfiguration

Kirtonia,

Williams,

Bayoumi

2024

2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS)

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Fault-Tolerant Reversible-Logic Based RO-PUF for Secure Device Authentication

Farah Naz,

Shah

2024

IEEE Trans. Circuits Syst. I

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A New Reconfigurable True Random Number Generator and Physical Unclonable Function Unified Chip With On-Chip Auto-Calibration

Abstract: A new reconfigurable true random number generator and physical unclonable function unified chip with on-chip auto-calibration

Cited by 3 publications

References 39 publications

A 0.012‐mm² 0.244‐pJ/bit successive approximation register analog‐to‐digital converter‐based true random number generator for Internet of Things applications in a 65‐nm complementary metal–oxide–semiconductor

A 0.012‐mm² 0.244‐pJ/bit successive approximation register analog‐to‐digital converter‐based true random number generator for Internet of Things applications in a 65‐nm complementary metal–oxide–semiconductor

Jitter-Based True Random Number Generator with Dynamic Selection Bit Reconfiguration

Fault-Tolerant Reversible-Logic Based RO-PUF for Secure Device Authentication

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A New Reconfigurable True Random Number Generator and Physical Unclonable Function Unified Chip With On-Chip Auto-Calibration

Abstract: A new reconfigurable true random number generator and physical unclonable function unified chip with on-chip auto-calibration

Cited by 3 publications

References 39 publications

A 0.012‐mm2 0.244‐pJ/bit successive approximation register analog‐to‐digital converter‐based true random number generator for Internet of Things applications in a 65‐nm complementary metal–oxide–semiconductor

A 0.012‐mm2 0.244‐pJ/bit successive approximation register analog‐to‐digital converter‐based true random number generator for Internet of Things applications in a 65‐nm complementary metal–oxide–semiconductor

Jitter-Based True Random Number Generator with Dynamic Selection Bit Reconfiguration

Fault-Tolerant Reversible-Logic Based RO-PUF for Secure Device Authentication

Contact Info

Product

Resources

About

A 0.012‐mm² 0.244‐pJ/bit successive approximation register analog‐to‐digital converter‐based true random number generator for Internet of Things applications in a 65‐nm complementary metal–oxide–semiconductor

A 0.012‐mm² 0.244‐pJ/bit successive approximation register analog‐to‐digital converter‐based true random number generator for Internet of Things applications in a 65‐nm complementary metal–oxide–semiconductor