A Novel Multi-Mode Charge Pump in Word Line Driver for Compute-in-Memory Arrays

Abstract

Flash memory, as the core unit of a compute-in-memory (CIM) array, requires multiple positive and negative (PN) high voltages (HVs) for word lines (WLs) to operate during storage and computation. A traditional WL driver generates these voltages using several charge pumps (CPs), leading to significant area overhead. This paper presents a novel multi-mode CP (MMCP) that generates all required HVs for a CIM array under a single CP, supporting CIM unit operation in programming, readout, and erase modes. Unlike traditional voltage multipliers, the MMCP eliminates the need for multiple CPs, reducing area and pump capacitor usage. Compared to a PN CP that drives a common load, the MMCP can provide multiple PN HVs by using level shifters (LSs) and switches. The MMCP is designed in a 55 nm standard CMOS process with an area of only 0.021 mm2. Additionally, this paper proposes global PN HV switches, which can correctly deliver the PN HVs generated by the MMCP from the same port (at different times) to the upper and lower power rails of WL driver circuits. Simulation results show that with a 2.5 V supply, 100 pF load, and 50 μA current, the maximum error due to ripple is only 0.28%.