A Parallel Residue‐to‐binary Converter for the Moduli Set {2m−1111,220m+,221m+,…,22km+}

Abstract

In this paper, a high-speed parallel residue-to-binary converter is proposed for a recently introduced moduli set S k ¼ {2 m 2 1; 2 2 0 m þ 1; 2 2 1 m þ 1; . . .; 2 2 k m þ 1} for a general value of k. The proposed converter uses simple cyclic shift and concatenation operations and does not require any multiplier. Individual converters for the cases of k ¼ 0 and k ¼ 1 are derived from the general architecture and compared with those existing in the literature. The converter for S 0 is twice as fast requiring only onehalf of the hardware, while that of S 1 is three times as fast, but requiring only 60% of the hardware, as compared to the corresponding ones existing in the literature. Furthermore, the proposed converters are implemented using 0.5-micron CMOS VLSI technology. Based on S 0 , the layouts for 8-bit, 16-bit, 32-bit and 64-bit converters are generated, and the corresponding simulation results obtained. INTRODUCTIONDuring the past decade, the residue number system (RNS) arithmetic has received considerable attention in arithmetic computation and signal processing applications, such as the fast Fourier transform, digital filtering and image processing. The main reasons for this attention are the inherent properties enjoyed by the RNS such as parallelism, modularity, fault tolerance and carry free operations [2 -4]. The crucial step for any successful RNS application is the residue-to-binary (R/B) conversion. In recent years, the conversion process has been studied very extensively [5 -20].In order to use the RNS to represent binary numbers, a moduli set has to be chosen. Recently, several new moduli sets have been proposed [5 -9]. One such set is S k ¼ {2 m 2 1; 2 2 0 m þ 1; 2 2 1 m þ 1; . . .; 2 2 k m þ 1}, for which the R/B converters for the cases of k ¼ 0 and k ¼ 1 have been also proposed [5]. According to Ref [5], this moduli set is expected to play an important role in the RNS, since the multiplications in the R/B conversion of this moduli set have been replaced by simple shift operations of signed-digit numbers. It has been shown in Ref.[5] that the R/B converter for S k is much faster and simpler compared to the existing converters. For 8-bit dynamic range, the FA-based R/B converter of Ref.[10] requires 837 transistors with 51 gate delays while the converter based on S k of Ref.[5] requires only 510 transistors with 38 gate delays. However, no R/B converter for S k has been designed so far for k $ 2: Since more than two or three moduli must be considered for large dynamic ranges [11], an introduction of the converter for a general k is essential.In this paper, we propose a high-speed parallel R/B converter for the general moduli set S k ; this converter also uses no multipliers. Instead of shifting the signed-digit numbers, we use simple cyclic shift and concatenation operations. For the purpose of comparison, the individual converters for the cases of k ¼ 0 and k ¼ 1 are derived from the general architecture. The new converter for S 0 is twice as fast as the one in Ref.[5] requiring only one-ha...

A systemic performance estimation and moduli set selection method for residue number systems

“…马上等: 一种余数基性能评估及多通道余数基构建方法 在大动态范围应用场合将限制 RNS 的应用. 文献 [10] 给出的 {2 n − 1, 2 2 0 n + 1, 2 2 1 n + 1, . .…”

“…文献 [6,7] 分别提出了基为 {2 n − 1, 2 n , 2 n + 1, 2 2n + 1} 和 {2 n − 3, 2 n − 1, 2 n + 1, 2 n + 3} 的四通道余数基, 文献 [8] 给出了形如 {2 n − 1, 2 n , 2 n + 1, 2 n+1 + 1} 和 {2 n − 1, 2 n , 2 n + 1, 2 n−1 + 1} 的余数基. 而文献 [9] 提出了形如 {2 n − 1, 2 n , 2 n + 1, 2 n+1 − 1, 2 n−1 − 1} 的五通道余数基, 文献 [10] 则给出了具有 {2 m − 1, 2 2 0 m + 1, 2 2 1 m + 1, . .…”

“…马上等: 一种余数基性能评估及多通道余数基构建方法 余数基基本形式进行对比分析, 结果如表 10 所示, 表 10 中还包含了文献 [10] 所提出的多通道余数基 性能分析. 可见, 仅利用 2 n 和 2 n ± 1 分量很难构造五通道以上的余数基, 文献 […”